Bradley S. Carlson - researchr alias

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Viewing Publication 1 - 21 from 21

2001

Principles vs. Practices in Undergraduate Microelectronic Systems EducationBradley S. Carlson. mse 2001: 22-23 [doi]

2000

Power estimation for a submicron CMOS inverter driving a CRC interconnect loadHung-Jung Chen, Bradley S. Carlson. glvlsi 2000: 162-166 [doi]

1999

Transistor Chaining in Static CMOS Functional Cells of Arbitrary Planar TopologyBradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian. DAM, 90(1-3):89-114, 1999. [doi]

1998

Parallel implementation of a unified approach to image focus and defocus analysis on the Parallel Virtual MachineYen-Fu Liu, Nai-Wei Lo, Murali Subbarao, Bradley S. Carlson. spieVIP 1998: 100-111 [doi]

1997

A VLSI circuit design course for practitioners and researchersBradley S. Carlson. mse 1997: 9-10 [doi]

Parallel logic simulation on a network of workstations using parallel virtual machineMaciek Kormicki, Ausif Mahmood, Bradley S. Carlson. todaes, 2(2):123-134, 1997. [doi]

Fault Tolerant Algorithms for Broadcasting on the Star Graph NetworkN. W. Lo, Bradley S. Carlson, D. L. Tao. TC, 46(12):1357-1362, 1997.

Critical Voltage Transition Logic: An Ultrafast CMOS Logic FamilyZhang Zhu, Bradley S. Carlson. iccd 1997: 732-737

1996

Transistor Chaining in CMOS Leaf Cells of Planar TopologyBradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian. glvlsi 1996: 194-199 [doi]

A Unified Algorithm for the Estimation and Scheduling of Data Flow GraphsYuan Hu, Bradley S. Carlson. jcsc, 6(3):287-318, 1996. [doi]

Parallel logic simulation on a network of workstations using PVMMaciek Kormicki, Ausif Mahmood, Bradley S. Carlson. spdp 1996: 2-9 [doi]

1995

1994

Improved Lower Bounds for the Scheduling Optimization ProblemYuan Hu, Bradley S. Carlson. iscas 1994: 295-298

A Unified Algorithm for Estimation and Scheduling in Data Path SynthesisYuan Hu, Bradley S. Carlson. iscas 1994: 57-60

1993

Performance Enhancement of CMOS VLSI Circuits by Transistor ReorderingBradley S. Carlson, C. Y. Roger Chen. dac 1993: 361-366 [doi]

Lower Bounds on the Iteration Time and the Number of Resources for Functional Pipelined Data Flow GraphsYuan Hu, Ahmed Ghouse, Bradley S. Carlson. iccd 1993: 21-24

1991

Optimal cell generation for dual independent layout stylesBradley S. Carlson, C. Y. Roger Chen, Uminder Singh. tcad, 10(6):770-782, 1991. [doi]

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