Chang-Tzu Lin - researchr alias

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Viewing Publication 1 - 21 from 21

2021

Learning Based Placement Refinement to Reduce DRC Short ViolationsYing-Yao Huang, Chang-Tzu Lin, Wei-Lun Liang, Hung-Ming Chen. vlsi-dat 2021: 1-4 [doi]

2019

More Effective Power Network Prototyping by Analytical and Centroid LearningYu-Hsiang Chuang, Chang-Tzu Lin, Hung-Ming Chen, Chi-Han Lee, Ting-Sheng Chen. iscas 2019: 1-5 [doi]

2017

2016

A New Methodology for Noise Sensor Placement Based on Association Rule MiningYu-Hsiang Hung, Sheng-Hsin Fang, Hung-Ming Chen, Shen-Min Chen, Chang-Tzu Lin, Chia-Hsin Lee. glvlsi 2016: 81-86 [doi]

2014

Improving power delivery network design by practical methodologiesChia-Chi Huang, Chang-Tzu Lin, Wei-Syun Liao, Chieh-Jui Lee, Hung-Ming Chen, Chia-Hsin Lee, Ding-Ming Kwai. iccd 2014: 237-242 [doi]

A power delivery network (PDN) engineering change order (ECO) approach for repairing IR-drop failures after the routing stageTsu-Wei Tseng, Chang-Tzu Lin, Chia-Hsin Lee, Yung-Fa Chou, Ding-Ming Kwai. vlsi-dat 2014: 1-4 [doi]

2013

2012

Hierarchical power network synthesis for multiple power domain designsChieh-Jui Lee, Shih-Ying Liu, Chuan-Chia Huang, Hung-Ming Chen, Chang-Tzu Lin, Chia-Hsin Lee. isqed 2012: 477-482 [doi]

3-D centric technology and realization with TSVChang-Tzu Lin, Chia-Hsin Lee, Tsu-Wei Tseng, Ding-Ming Kwai, Yung-Fa Chou. vlsi-dat 2012: 1-4 [doi]

2011

3D Stacked IC layout considering bond pad density and doubling for manufacturing yield improvementDing-Ming Kwai, Chang-Tzu Lin. isqed 2011: 129-134 [doi]

2010

CAD reference flow for 3D via-last integrated circuitsChang-Tzu Lin, Ding-Ming Kwai, Yung-Fa Chou, Ting-Sheng Chen, Wen Ching Wu. aspdac 2010: 187-192 [doi]

2007

Fixed-outline floorplanning using robust evolutionary searchDe-Sheng Chen, Chang-Tzu Lin, Yiwen Wang 0003, Ching-Hwa Cheng. eaai, 20(6):821-830, 2007. [doi]

Noise-Aware Floorplanning for Fast Power Supply Network DesignChang-Tzu Lin, Tai-Wei Kung, De-Sheng Chen, Yi-Wen Wang, Ching-Hwa Cheng. iscas 2007: 2028-2031 [doi]

2006

Modern Floorplanning with Boundary and Fixed-outline Constraints via Genetic Clustering AlgorithmChang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang. jcsc, 15(1):107-128, 2006. [doi]

2005

Modem floorplanning with abutment and fixed-outline constraintsChang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang, Hsin-Hsien Ho. iscas 2005: 6214-6217 [doi]

2004

Robust fixed-outline floorplanning through evolutionary searchChang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang. aspdac 2004: 42-44 [doi]

2003

Non-slicing floorplans with boundary constraints using generalized polish expressionDe-Sheng Chen, Chang-Tzu Lin, Yiwen Wang 0003. aspdac 2003: 342-345 [doi]

2002

GPE: A New Representation for VLSI Floorplan ProblemChang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang. iccd 2002: 42-44 [doi]

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