Enrico Temporiti - researchr alias

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Viewing Publication 1 - 28 from 28

2026

2025

A 27 GHz Phase-Coupled Distributed Quad-Core Oscillator in 12 nm FinFETValentina Marazzi, Lorenzo Porcheddu, Marco Garampazzi, Enrico Temporiti, Danilo Manstretta. apccas 2025: 1-5 [doi]

2024

2019

2016

2015

2014

FDMA-PON and NG-PON2: Performance and cost comparisonSilvio Abrate, Roberto Gaudino, Benoît Charbonnier, Sylvie Menezo, Enrico Temporiti, Guang-Hua Duan, Peter O'Brien. icton 2014: 1-4 [doi]

A Low-Noise Design Technique for High-Speed CMOS Optical ReceiversDan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto. jssc, 49(6):1437-1447, 2014. [doi]

th order gm-C low-pass filter with ±3% cut-off frequency accuracy and 220MHz to 3.3GHz tuning-range in 28nm LP CMOSN. Sabatino, Gabriele Minoia, M. Roche, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti. esscirc 2014: 351-354 [doi]

A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm CMOS technologiesEnrico Temporiti, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Francesco Svelto. esscirc 2014: 131-134 [doi]

2012

A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto. esscirc 2012: 221-224 [doi]

2011

A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOSFederico Vecchi, Stefano Bozzola, Enrico Temporiti, Davide Guermandi, Massimo Pozzoni, Matteo Repossi, Marco Cusmai, Ugo Decanis, Andrea Mazzanti, Francesco Svelto. jssc, 46(3):551-561, 2011. [doi]

2010

A 3.5 GHz Wideband ADPLL With Fractional Spur Suppression Through TDC Dithering and Feedforward CompensationEnrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Marco Cusmai, Francesco Svelto. jssc, 45(12):2723-2736, 2010. [doi]

A wideband mm-Wave CMOS receiver for Gb/s communications employing interstage coupled resonatorsFederico Vecchi, Stefano Bozzola, Massimo Pozzoni, Davide Guermandi, Enrico Temporiti, Matteo Repossi, Ugo Decanis, Andrea Mazzanti, Francesco Svelto. isscc 2010: 220-221 [doi]

Insights Into Wideband Fractional ADPLLs: Modeling and Calibration of Nonlinearity Induced Fractional SpursColin Weltin-Wu, Enrico Temporiti, Marco Cusmai, Daniele Baldi, Francesco Svelto. tcas, 57-I(9):2259-2268, 2010. [doi]

A 3.5GHz wideband ADPLL with fractional spur suppression through TDC dithering and feedforward compensationColin Weltin-Wu, Enrico Temporiti, Daniele Baldi, Marco Cusmai, Francesco Svelto. isscc 2010: 468-469 [doi]

2009

A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction TechniquesEnrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Riccardo Tonietto, Francesco Svelto. jssc, 44(3):824-834, 2009. [doi]

Insights into wideband fractional All-Digital PLLs for RF applicationsEnrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Riccardo Tonietto, Francesco Svelto. cicc 2009: 37-44 [doi]

2008

A 3GHz Fractional-N All-Digital PLL with Precise Time-to-Digital Converter Calibration and Mismatch CorrectionColin Weltin-Wu, Enrico Temporiti, Daniele Baldi, Francesco Svelto. isscc 2008: 344-345 [doi]

2004

A 700-kHz bandwidth /spl Sigma//spl Delta/ fractional synthesizer with spurs compensation and linearization techniques for WCDMA applicationsEnrico Temporiti, Guido Albasini, Ivan Bietti, Rinaldo Castello, Matteo Colombo. jssc, 39(9):1446-1454, 2004. [doi]

2003

An UMTS ΣΔ fractional synthesizer with 200 kHz bandwidth and -128 dBc/Hz @ 1 MHz using spurs compensation and linearization techniquesIvan Bietti, Enrico Temporiti, Guido Albasini, Rinaldo Castello. cicc 2003: 463-466 [doi]

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