Friedel Gerfers - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 95 from 95

2024

A Multiport Coaxial Interconnection for MTCA.4 Based High-Frequency Instrumentation ApplicationsJohannes Zink, Frank Ludwig, Szymon Jablonski, Uros Mavric, Michael Fenner, Stanislav Chystiakov, Holger Schlarb, Friedel Gerfers. tim, 73:1-8, 2024. [doi]

2023

25Gbps Automotive Ethernet ECU PCB: MDI Design Implementation and Insertion Loss CharacterizationJamila Josip Borda, Kirsten Matheus, Friedel Gerfers. vehits 2023: 74-84 [doi]

25Gbps Automotive Ethernet: System PHY Characterization of ESD Based EM InterferencesJamila Josip Borda, Friedel Gerfers. etfa 2023: 1-6 [doi]

A 4 GBaud 5 Vpp Class-B Pre-Driver Design for GaN-Based Switching Power Amplifier in 22 nm SOI-CMOS Utilizing LDMOSFrowin Buballa, Sebastian Linnhoff, Enne Wittenhagen, Urs Hecht, Friedel Gerfers. newcas 2023: 1-5 [doi]

A 4.4 GS/s 220 MHz ΣΔ ADC with a Linearized Back-Gate Controlled GmC FilterJulius Edler, Marcel Runge, Sebastian Linnhoff, Friedel Gerfers. vlsit 2023: 1-2 [doi]

True Voltage-Mode NRZ VCSEL Transmitter enabling 60 Gbit/s at 0.37 pJ/bit in 22 nm FDSOIUrs Hecht, Helia Ordouei, Nikolay Ledentsov Jr., Philipp Scholz, Patrick Kurth, Nikolay N. Ledentsov, Friedel Gerfers. esscirc 2023: 365-368 [doi]

A 0.4 pJ/bit NRZ Voltage Mode VCSEL Driver for up to 224 Gbit/s SWDM LinksUrs Hecht, Helia Ordouei, Nikolay Ledentsov Jr., Philipp Scholz, Patrick Kurth, Ilya E. Titkov, Nikolay N. Ledentsov, Friedel Gerfers. ofc 2023: 1-3 [doi]

A Charge Pump for Sub-Sampling Phase-Locked Loops with Virtual Reference Frequency DoublingPatrick Kurth, Urs Hecht, Frowin Buballa, Sebastian Linnhoff, Helia Ordouei, Friedel Gerfers. iscas 2023: 1-5 [doi]

A 10Bit 6 GS/s Time-Interleaved SAR ADC with a Single Full-Rate Front-End Track-and-HoldSebastian Linnhoff, Frowin Buballa, Julius Edler, Enne Wittenhagen, Urs Hecht, Friedel Gerfers. newcas 2023: 1-5 [doi]

A Digital Pre-Distortion Technique Canceling Code-and Voltage-Dependent Output Impedance Errors in Current-Steering DACsHelia Ordouei, Clirim Alija, Patrick Kurth, Friedel Gerfers. iscas 2023: 1-5 [doi]

Undersampling and SNR Degradation in Practical Direct RF Sampling SystemsDennis Osterland, Andreas Benzin, Friedel Gerfers, Giuseppe Caire. eucnc 2023: 240-245 [doi]

An 18-MS/s 76-dB SNDR Continuous-Time Δ Σ Modulator Incorporating an Input Voltage Tracking GmC Loop FilterMarcel Runge, Julius Edler, Tobias Kaiser, Kai Misselwitz, Friedel Gerfers. jssc, 58(8):2288-2299, 2023. [doi]

A 12 GS/s RF-Sampler Employing Inductive Peaking with >57 dB |THD| and >49.3 dB SNDR in 22 nm FD-SOI CMOSEnne Wittenhagen, Patrick Kurth, Urs Hecht, Frowin Buballa, Sebastian Linnhoff, Nima Lotfi, Friedel Gerfers. newcas 2023: 1-4 [doi]

2022

6G D-Band Receiver Model with High Spectral Efficiency Enabling Global System OptimizationPatrick J. Artz, Friedel Gerfers. mwscas 2022: 1-4 [doi]

Characterization of Multi-Gigabit Automotive Ethernet Channel Radiated Emissions in Relation to ECU PCB Shield-Ground ImplementationsJamila Josip Borda, Kirsten Matheus, Friedel Gerfers. etfa 2022: 1-8 [doi]

Beyond 10Gbps Electrical Automotive Ethernet Channel Insertion Loss CharacterizationJamila Josip Borda, Kirsten Matheus, Friedel Gerfers. ivs 2022: 991-996 [doi]

PAM-4/6/8 Performance and Power Analysis for Next Generation 224Gbit/s LinksUrs Hecht, Enne Wittenhagen, Halil Cirit, Saman Behtash, Srinivas Venkataram, Friedel Gerfers. iscas 2022: 752-756 [doi]

Pasithea-1: An Energy-Efficient Self-contained CGRA with RISC-Like ISATobias Kaiser, Friedel Gerfers. arcs 2022: 33-47 [doi]

A Divider-less General PLL Lock Assist and Automatic Frequency Calibration System for Millimeter-Wave Sub-Sampling Phase-Locked LoopsPatrick Kurth, Philipp Nickel, Urs Hecht, Friedel Gerfers. icecsys 2022: 1-4 [doi]

A Calibration-Free 96.7 dB SNDR 4 MS/s CT I-SD Modulator With Single Feedback DACKai Misselwitz, Marcel Runge, Friedel Gerfers. icecsys 2022: 1-4 [doi]

In-Vehicle Network Standards - Overview and Implementation ExamplesHelia Ordouei, Friedel Gerfers, Silvio Waldmann. iscas 2022: 1023-1027 [doi]

A 30-MHz BW 74.6-dB SNDR 92-dB SFDR CT ΔΣ Modulator with Active Body-Bias DAC Calibration in 22nm FDSOI CMOSMarcel Runge, Julius Edler, Dario Schmock, Tobias Kaiser, Friedel Gerfers. cicc 2022: 1-2 [doi]

Sturdy-MASH Delta-Sigma Modulator with Improved Resolution Using Noise-coupling Multi-bit QuantizerAkif Omer Ucar, Friedel Gerfers. mwscas 2022: 1-4 [doi]

A novel OFDM-based Radar and Communication System Design using Digital IQ-Modulation and 52 GS/s Direct-RF Data ConverterSilvio Waldmann, Helia Ordouei, Friedel Gerfers. iscas 2022: 452-456 [doi]

A 224 Gbit/s Transceiver Front-end Design for Next Generation Data CentersEnne Wittenhagen, Urs Hecht, Halil Cirit, Saman Behtash, Srinivas Venkataram, Friedel Gerfers. icecsys 2022: 1-4 [doi]

A TI 12 GS/s Sampled Beam-Forming Receiver for a $2\times 2$ Antenna-Array with 69 dBc SFDREnne Wittenhagen, Patrick Kurth, Tobias Kaiser, Friedel Gerfers. icecsys 2022: 1-4 [doi]

2021

A 12 Bit 500 MS/s Sub-2 Radix SAR ADC for a Time-Interleaved 8 GS/s ADC in 28 nm CMOSFrowin Buballa, Sebastian Linnhoff, Michael Reinhold, Friedel Gerfers. iscas 2021: 1-5 [doi]

A Dynamic Body-Bias Linearization Technique Enabling Wide-Band GmC based Continous-Time Sigma-Delta Converters in 22 nm FD-SOI CMOSJulius Edler, Marcel Runge, Friedel Gerfers. mwscas 2021: 1090-1093 [doi]

Introduction to the Special Issue on the 2020 IEEE International Solid-State Circuits Conference (ISSCC)Friedel Gerfers, Ping-Hsuan Hsieh, Dejan Markovc, Jun Deguchi, Eric Karl. jssc, 56(1):3-6, 2021. [doi]

A Divider-less Automatic Frequency Calibration for Millimeter-Wave Sub-Sampling Phase-Locked LoopsPatrick Kurth, Urs Hecht, Enne Wittenhagen, Friedel Gerfers. mwscas 2021: 718-721 [doi]

A 56 GHz 19 fs RMS-Jitter Sub-Sampling Phase-Locked Loop for 112 Gbit/s TransceiversPatrick Kurth, K. Misselwitz, Urs Hecht, Friedel Gerfers. iscas 2021: 1-5 [doi]

A 12 Bit 8 GS/s Randomly-Time-Interleaved SAR ADC with Adaptive Mismatch CorrectionSebastian Linnhoff, Erik Sippel, Frowin Buballa, Michael Reinhold, Martin Vossiek, Friedel Gerfers. iscas 2021: 1-4 [doi]

A 18MS/s 76dB SNDR 93dB SFDR CT ΔΣ Modulator with Input Voltage Tracking 2nd-Order GmVC Filter and Shared FIR DAC in 22nm FDSOI CMOSMarcel Runge, Julius Edler, Tobias Kaiser, Friedel Gerfers. cicc 2021: 1-2 [doi]

A 0.9V 45MS/s CT ΔΣ Modulator with 94dB SFDR and 25.6fJ/conv. enabled by a Digital Static and ISI Calibration in 22 FDSOI CMOSMarcel Runge, Dario Schmock, Tobias Kaiser, Friedel Gerfers. cicc 2021: 1-2 [doi]

A Power Efficiency Enhancements of a Multi-Bit Accelerator for Memory Prohibitive Deep Neural NetworksSuhas Shivapakash, Hardik Jain, Olaf Hellwich, Friedel Gerfers. ojcands, 2:156-169, 2021. [doi]

FantastIC4: A Hardware-Software Co-Design Approach for Efficiently Running 4Bit-Compact Multilayer PerceptronsSimon Wiedemann, Suhas Shivapakash, Daniel Becking, Pablo Wiedemann, Wojciech Samek, Friedel Gerfers, Thomas Wiegand. ojcands, 2:407-419, 2021. [doi]

®Enne Wittenhagen, Marcel Runge, Nima Lotfi, Hossein Ghafarian, Yuan Tian, Friedel Gerfers. tcasI, 68(1):57-66, 2021. [doi]

2020

Up to 30-Fold BER Improvement using a Data-Dependent FFE Switching Technique for 112Gbit/s PAM-4 VCSEL Based LinksUrs Hecht, Nikolay Ledentsov Jr, Lukasz Chorchos, Patrick Kurth, Nikolay N. Ledentsov, Friedel Gerfers. ofc 2020: 1-3 [doi]

A 64 GBaud 6-Bit Current Steering DAC With a Binary Tree Current Summing NetworkPaul Hollmann, Marcel Runge, Friedel Gerfers. icecsys 2020: 1-4 [doi]

Towards pW-Class IoT Nodes using Crystalline Oxide Semiconductor Dynamic LogicTobias Kaiser, Friedel Gerfers. iscas 2020: 1-5 [doi]

A 12 bit 8 GS/s Time-Interleaved SAR ADC in 28nm CMOSSebastian Linnhoff, Frowin Buballa, Michael Reinhold, Friedel Gerfers. icecsys 2020: 1-4 [doi]

A DAC Linearization Technique Enabling 15-Bit INL through Adaptive Body-Biasing in 22FDXMarcel Runge, Dario Schmock, Enne Wittenhagen, Friedel Gerfers. iscas 2020: 1-5 [doi]

A Power Efficient Multi-Bit Accelerator for Memory Prohibitive Deep Neural NetworksSuhas Shivapakash, Hardik Jain, Olaf Hellwich, Friedel Gerfers. iscas 2020: 1-5 [doi]

A Sub-Sampling Beam-Forming Summation Track and Hold for Software Defined RadioEnne Wittenhagen, Marcel Runge, Wilhelm Keusgen, Friedel Gerfers. iscas 2020: 1-5 [doi]

2019

A CMOS-Based Electrochemical DNA Hybridization Microarray for Diagnostic Applications with 109 Test SitesNorman Dodel, Roland Thewes, Anouar Laifi, Dirk Eberhardt, Stefan Keil, Leonhard Sturm, Armin Klumpp, Oliver Freudenberg, Friedel Gerfers, Gerhard Hartwich. biocas 2019: 1-4 [doi]

Body-Bias Techniques in CMOS 22FDX® for Mixed-Signal Circuits and SystemsFriedel Gerfers, Nima Lotfi, Enne Wittenhagen, Hossein Ghafarian, Yuan Tian, Marcel Runge. icecsys 2019: 466-469 [doi]

Impedance Calibration Technique Canceling Process and Temperature Variation in Source Terminated DAC Drivers in 22nm FDSOIHossein Ghafarian, Helia Ordouei, Friedel Gerfers. mwscas 2019: 113-116 [doi]

An UWB 18.5 GS/s Sampling Front-End for a 74 GS/s 5-bit ADC in 22nm FDSOINima Lotfi, Friedel Gerfers. newcas 2019: 1-4 [doi]

A Single-Channel 18.5 GS/s 5-bit Flash ADC using a Body-Biased Comparator Architecture in 22nm FD-SOINima Lotfi, Pedro Lehmann Ibáñez, Marcel Runge, Friedel Gerfers. iscas 2019: 1-4 [doi]

High Performance Electronic Design Education - from Technology towards High Frequency Chip SetsAndreas Mai, Philipp Scholz, Gerhard G. Fischer, Friedel Gerfers. mcs 2019: 1-8 [doi]

Optimized Zero Placement within Noise Coupling Transfer Functions for Oversampled ADCsMarcel Runge, Nima Lotfi, Friedel Gerfers. iscas 2019: 1-5 [doi]

2018

Digital-to-Analog Converters Using Frequency Interleaving: Mathematical Framework and Experimental VerificationChristian Schmidt 0001, Christoph Kottke, Vicky H. Tanzil, Ronald Freund, Volker Jungnickel, Friedel Gerfers. cssp, 37(11):4929-4954, 2018. [doi]

Behavioral Model for a High-Speed 2: 1 Analog MultiplexerChristian Schmidt 0001, Patrick Zielonka, Volker Jungnickel, Ronald Freund, Tobias Tannert, Markus Grozing, Manfred Berroth, Friedel Gerfers. mwscas 2018: 1-4 [doi]

AMDAC Common-Mode Shifting Technique enabling Power Consumption Reduction in Pipeline ADCsNima Lotfi, Marcel Runge, Friedel Gerfers. mwscas 2018: 400-403 [doi]

Analysis of Package Impedance Effects on the Linearity of Source Series Terminated DACsHelia Ordouei, Hossein Ghafarian, Friedel Gerfers. mwscas 2018: 250-253 [doi]

A Temperature and Process Corner Insensitive Design Method for Digital Circuits in 40nm CMOSMarcel Runge, Sebastian Linnhoff, Friedel Gerfers. mwscas 2018: 779-782 [doi]

Correlation Based Time-Variant DAC Error Estimation in Continuous-Time ∑Δ ADCs With Pseudo Random NoiseMarcel Runge, Friedel Gerfers. iscas 2018: 1-5 [doi]

A 0.02-mm2 9-bit 100-MS/s Charge-Injection Cell Based SAR-ADC in 65-nm LP CMOSMarcel Runge, Dario Schmeck, Philipp Scholz, Georg Böck, Friedel Gerfers. esscirc 2018: 26-29 [doi]

2017

A digital calibration technique canceling non-linear switch and package impedance effects of a 1.6GS/s TX-DAC in 28 nm CMOSHossein Ghafarian, Friedel Gerfers. iscas 2017: 1-4 [doi]

Analysis and compensation technique canceling non-linear switch and package impedance effects of a 3.2GS/S TX-DACHossein Ghafarian, Friedel Gerfers. mwscas 2017: 1172-1175 [doi]

Channel analysis for a 6.4 Gb/s DDR5 data buffer receiver front-endStefanie Lehmann, Friedel Gerfers. newcas 2017: 109-112 [doi]

Noise and non-linearity analysis of a charge-injection-cell-based 10-bit 50-MS/s SAR-ADCMarcel Runge, Dario Schmock, Friedel Gerfers. mwscas 2017: 1025-1028 [doi]

A digital compensation method canceling static and non-linear time-variant feedback DAC errors in ΣΔ analog-to-digital convertersMarcel Runge, Friedel Gerfers. iscas 2017: 1-4 [doi]

High output power frequency doubler for digital PLLs in fully integrated 24 GHz CMOS radar systemsSoenke Vehring, Yaoshun Ding, Philipp Scholz, Dominic Maurath, Friedel Gerfers, Georg Böck. icuwb 2017: 1-4 [doi]

Link-budget calculations for CMOS integrated microwave receiversSoenke Vehring, Yaoshun Ding, Dominic Maurath, Friedel Gerfers, Georg Böck. eurocon 2017: 181-186 [doi]

2016

Implementation and design investigation of 40 Gbps driver IC for silicon photonics ring-modulator in SiGe 130-nmAdel Fatemi, Heinrich Klar, Friedel Gerfers. iscas 2016: 2387-2390 [doi]

2012

2008

A 0.2-2 Gb/s 6x OSR Receiver Using a Digitally Self-Adaptive EqualizerFriedel Gerfers, Gerrit W. den Besten, Pavel V. Petkov, Jim E. Conder, Andreas J. Koellmann. jssc, 43(6):1436-1448, 2008. [doi]

2007

On the Implicit Anti-Aliasing Feature of Continuous-Time Cascaded Sigma-Delta ModulatorsMatthias Keller, Alexander Buhmann, Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli. tcas, 54-I(12):2639-2645, 2007. [doi]

2006

A transistor-based clock jitter insensitive DAC architectureFriedel Gerfers, Maurits Ortmanns, P. Schmitz. iscas 2006: [doi]

An infinite-skew tolerant delay locked loopPavel Petkov, Jim Conder, Friedel Gerfers. iscas 2006: [doi]

2005

2004

2003

A 1.5-V 12-bit power-efficient continuous-time third-order ΣΔ modulatorFriedel Gerfers, Maurits Ortmanns, Yiannos Manoli. jssc, 38(8):1343-1352, 2003. [doi]

A 1 V, 12-bit wideband continuous-time /spl Sigma//spl Delta/ modulator for UMTS applicationsFriedel Gerfers, Maurits Ortmanns, Yiannos Manoli. iscas 2003: 921-924 [doi]

A clock jitter insensitive multibit DAC architecture for high-performance low-power continuous-time ΣΔ modulatorsFriedel Gerfers, Maurits Ortmanns, P. Schmitz, Yiannos Manoli, Kian Min Soh. icecsys 2003: 958-961 [doi]

Compensation of the influence of finite gain-bandwidth on continuous-time sigma-delta modulatorsMaurits Ortmanns, Friedel Gerfers, Yiannos Manoli. icecsys 2003: 950-953 [doi]

A continuous-time sigma-delta modulator with switched capacitor controlled current mode feedbackMaurits Ortmanns, Friedel Gerfers, Yiannos Manoli. esscirc 2003: 249-252 [doi]

Fundamental limits of jitter insensitivity in discrete and continuous-time sigma delta modulatorsMaurits Ortmanns, Friedel Gerfers, Yiannos Manoli. iscas 2003: 1037-1040 [doi]

Influence of finite integrator gain bandwidth on continuous-time sigma delta modulatorsMaurits Ortmanns, Friedel Gerfers, Yiannos Manoli. iscas 2003: 925-928 [doi]

2002

2001

2000

A 1.5V low-power third order continuous-time lowpass Sigma-Delta A/D converter (poster session)Friedel Gerfers, Yiannos Manoli. islped 2000: 219-221 [doi]

See Also

All Publications

Filter by Year
OR AND NOT 1

Filter by Type
OR AND NOT 1

Filter by Tag
OR AND NOT 1

Filter by Venue

[+]
OR AND NOT 1

Filter by Author

[+]
OR AND NOT 1

Filter by Top Terms

[+]
OR AND NOT 1

Researchr

Publications by 'Friedel Gerfers'

Viewing Publication 1 - 95 from 95

2024

2023

2022

2021

2020

2019

2018

2017

2016

2012

2008

2007

2006

2005

2004

2003

2002

2001

2000

See Also

All Publications

Filter by YearOR AND NOT 1

Filter by TypeOR AND NOT 1

Filter by TagOR AND NOT 1

Filter by Venue [+]OR AND NOT 1

Filter by Author [+]OR AND NOT 1

Filter by Top Terms [+]OR AND NOT 1

Researchr

Publications by 'Friedel Gerfers'

Viewing Publication 1 - 95 from 95

2024

2023

2022

2021

2020

2019

2018

2017

2016

2012

2008

2007

2006

2005

2004

2003

2002

2001

2000

Filter by Year
OR AND NOT 1

Filter by Type
OR AND NOT 1

Filter by Tag
OR AND NOT 1

Filter by Venue

[+]
OR AND NOT 1

Filter by Author

[+]
OR AND NOT 1

Filter by Top Terms

[+]
OR AND NOT 1