Fujio Masuoka - researchr alias

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Viewing Publication 1 - 10 from 10

2021

1.5-nm Node Surrounding Gate Transistor (SGT)-SRAM Cell with Staggered Pillar and Self-Aligned Process for Gate, Bottom Contact, and PillarYisuo Li, Ken'ichi Kanazawa, Tetsuo Izawa, Koji Sakui, Georg Strof, Oskar Baumgartner, Gerhard Rzepa, Markus Karner, Zlatan Stanojevic, Nozomu Harada, Fujio Masuoka. imw2 2021: 1-4 [doi]

2008

nor Flash MemoryTakuya Kadowaki, Yoshizumi Yamakawa, Hiroki Nakamura, Yasuo Kimura, Michio Niwano, Fujio Masuoka. tcas, 55-II(6):551-555, 2008. [doi]

2006

Decananometer Surrounding Gate Transistor (SGT) Scalability by Using an Intrinsically-Doped Body and Gate Work Function EngineeringYasue Yamamoto, Takeshi Hidaka, Hiroki Nakamura, Hiroshi Sakuraba, Fujio Masuoka. ieicet, 89-C(4):560-567, 2006. [doi]

2001

1999

New three-dimensional memory array architecture for future ultrahigh-density DRAMTetsuo Endoh, Katsuhisa Shinmei, Hiroshi Sakuraba, Fujio Masuoka. jssc, 34(4):476-483, 1999. [doi]

1995

1994

A quick intelligent page-programming architecture and a shielded bitline sensing method for 3 V-only NAND flash memoryTomoharu Tanaka, Yoshiyuki Tanaka, Hiroshi Nakamura, Koji Sakui, Hideko Oodaira, Riichiro Shirota, Kazunori Ohuchi, Fujio Masuoka, Hisashi Hara. jssc, 29(11):1366-1373, November 1994. [doi]

1993

Reliability issues of flash memory cellsSeiichi Aritome, Riichiro Shirota, Gertjan Hemink, Tetsuo Endoh, Fujio Masuoka. pieee, 81(5):776-788, 1993. [doi]

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