Marek Syrzycki - researchr alias

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Viewing Publication 1 - 13 from 13

2013

Investigation of STI diodes as electrostatic discharge (ESD) protection devices in deep submicron (DSM) CMOS processThomas Au, Marek Syrzycki. ccece 2013: 1-5 [doi]

2012

A high performance NMOS-switch high swing cascode charge pump for phase-locked loopsCheng Zhang, Thomas Au, Marek Syrzycki. mwscas 2012: 554-557 [doi]

2011

Current source transistor optimization methodology for noise optimized charge sensitive amplifier with fast shaperMing-Cheng Lin, Marek Syrzycki. ccece 2011: 735-738 [doi]

Single-Stage Vernier Time-to-Digital Converter with Sub-Gate Delay Time ResolutionChin-Hsin Lin, Marek Syrzycki. cs, 2(4):365-371, 2011. [doi]

Process variation compensated voltage controlled ring oscillator with Subtraction-based Voltage Controlled Current SourceCheng Zhang, Ming-Cheng Lin, Marek Syrzycki. ccece 2011: 731-734 [doi]

2007

Triple-Threshold Static Power Minimization in High-Level Synthesis of VLSI CMOSHarry I. A. Chen, Edward K. W. Loo, James B. Kuo, Marek Syrzycki. patmos 2007: 453-462 [doi]

2006

Tunable continuous-time bandpass ΣΔ modulators with fractional delaysRobert Sobot, Shawn Stapleton, Marek Syrzycki. tcas, 53(2):264-273, 2006. [doi]

2004

2002

Manufacturability Analysis of Analog CMOS ICs through Examination of Multiple Layout SolutionsPedram Khademsameni, Marek Syrzycki. dft 2002: 3-11 [doi]

1992

Wafer-Scale Transducer ArraysGlenn H. Chapman, M. Parameswaran, Marek Syrzycki. Computer, 25(4):50-56, 1992.

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