Nobu Matsumoto - researchr alias

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Viewing Publication 1 - 18 from 18

2020

2 Voltage/Time Dual-Data-Converter-Based AFESatoshi Kondo, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono, Tuan Thanh Ta, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka, Katsuyuki Kimura, Akihide Sai, Nobu Matsumoto. isscc 2020: 94-96 [doi]

2 Voltage/Time Dual-Data-Converter-Based AFESatoshi Kondo, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono, Tuan Thanh Ta, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka, Katsuyuki Kimura, Akihide Sai, Nobu Matsumoto. jssc, 55(11):2866-2877, 2020. [doi]

2019

Inter-Frame Smart-Accumulation Technique for Long-Range and High-Pixel Resolution LiDARKen Tanabe, Hiroshi Kubota, Akihide Sai, Nobu Matsumoto. coolchips 2019: 1-3 [doi]

2018

Data selection and de-noising based on reliability for long-range and high-pixel resolution LiDARKen Tanabe, Hiroshi Kubota, Akihide Sai, Nobu Matsumoto. coolchips 2018: 1-3 [doi]

2013

A near-future prediction method for low power consumption on a many-core processorTakeshi Kodaka, Akira Takeda, Shunsuke Sasaki, Akira Yokosawa, Toshiki Kizu, Takahiro Tokuyoshi, Hui Xu, Toru Sano, Hiroyuki Usui, Jun Tanabe, Takashi Miyamori, Nobu Matsumoto. date 2013: 1058-1059 [doi]

2010

A new compilation technique for SIMD code generation across basic block boundariesHiroaki Tanaka, Yutaka Ota, Nobu Matsumoto, Takuji Hieda, Yoshinori Takeuchi, Masaharu Imai. aspdac 2010: 101-106 [doi]

2009

Design and implementation of scalable, transparent threads for multi-core media processorTakeshi Kodaka, Shunsuke Sasaki, Takahiro Tokuyoshi, Ryuichiro Ohyama, Nobuhiro Nonogaki, Koji Kitayama, Tatsuya Mori, Yasuyuki Ueda, Hideho Arakida, Yuji Okuda, Toshiki Kizu, Yoshiro Tsuboi, Nobu Matsumoto. date 2009: 1035-1039 [doi]

2007

Generation of Pack Instruction Sequence for Media Processors Using Multi-Valued Decision DiagramHiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Hiroki Tagawa, Yutaka Ota, Nobu Matsumoto. ieicet, 90-A(12):2800-2809, 2007. [doi]

2006

Pack instruction generation for media pUsing multi-valued decision diagramHiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Yutaka Ota, Nobu Matsumoto, Masaki Nakagawa. codes 2006: 154-159 [doi]

2003

A single-chip MPEG-2 codec based on customizable media embedded processorShunichi Ishiwata, Tomoo Yamakage, Yoshiro Tsuboi, Takayoshi Shimazawa, Tomoko Kitazawa, Shuji Michinaka, Kunihiko Yahagi, Hideki Takeda, Akihiro Oue, Tomoya Kodama, Nobu Matsumoto, Takayuki Kamei, Mitsuo Saito, Takashi Miyamori, Goichi Ootomo, Masataka Matsui. jssc, 38(3):530-540, 2003. [doi]

2002

2001

A New Verification Methodology for Complex Pipeline BehaviorKazuyoshi Kohno, Nobu Matsumoto. dac 2001: 816-821 [doi]

1993

A Compaction Method for Full Chip VLSI LayoutsJoseph Dao, Nobu Matsumoto, Tsuneo Hamai, Chusei Ogawa, Shojiro Mori. dac 1993: 407-412 [doi]

1990

Datapath Generator Based on Gate-Level Symbolic LayoutNobu Matsumoto, Yoko Watanabe, Kimiyoshi Usami, Yukio Sugeno, Hiroshi Hatada, Shojiro Mori. dac 1990: 388-393 [doi]

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