Péter Arató - researchr alias

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Viewing Publication 1 - 12 from 12

2021

Implementation of an SoC architecture with built-in safety featuresTibor Gergely Markovits, Péter Arató, György Rácz. socc 2021: 95-100 [doi]

2017

A decomposition-based system level synthesis method for heterogeneous multiprocessor architecturesGyorgy Racz, Péter Arató. socc 2017: 381-386 [doi]

2015

Comparison of two loop-free decomposition methodsPéter Arató, Dániel Andras Drexler. saci 2015: 477-481 [doi]

A Modified Inertial Method for Loop-free Decomposition of Acyclic Directed GraphsDániel András Drexler, Péter Arató. macro 2015: 61-72 [doi]

2014

A data flow graph generation method starting from c description by handling loop nest hierarchyPéter Arató, Gergely Suba. saci 2014: 269-274 [doi]

2007

Finding optimal hardware/software partitionsZoltán Ádám Mann, András Orbán, Péter Arató. fmsd, 31(3):241-263, 2007. [doi]

2005

Extending component-based design with hardware componentsPéter Arató, Zoltán Ádám Mann, András Orbán. SCP, 56(1-2):23-39, 2005. [doi]

Time-constrained scheduling of large pipelined datapathsPéter Arató, Zoltán Ádám Mann, András Orbán. jsa, 51(12):665-687, 2005. [doi]

Algorithmic aspects of hardware/software partitioningPéter Arató, Zoltán Ádám Mann, András Orbán. todaes, 10(1):136-156, 2005. [doi]

2004

Component-Based Hardware-Software Co-designPéter Arató, Zoltán Ádám Mann, András Orbán. arcs 2004: 169-183 [doi]

2003

Hardware Definition Based on Standard C-language Source CodePéter Arató, Bence Csák. fdl 2003: 727-736 [doi]

1978

Microprogrammed logic network designZoltán László, Péter Arató. mam, 2(2):73-76, 1978. [doi]

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