Paul M. Chau - researchr alias

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Viewing Publication 1 - 44 from 44

2014

Constrained Sensor System Resolves Closely Spaced Obscured Low-SNR Sources Using Virtual BeamformingCláudio S. Marino, Paul M. Chau. tim, 63(1):231-242, 2014. [doi]

2012

Low-Level Sinusoidal Signal Detection From a High-Resolution Virtual Spectral Image Using Autoregressive Vector ExtrapolationCláudio S. Marino, Paul M. Chau. tim, 61(9):2413-2421, 2012. [doi]

2006

Power aware attitude computation during rapid rotational motionJeanette F. Arrigo, Paul M. Chau. tim, 55(1):63-69, 2006. [doi]

Objective Human Visual System Based Video Quality Assessment Metric for Low Bit-Rate Video Communication SystemsDavid Chih-Che Lin, Paul M. Chau. mmsp 2006: 320-323 [doi]

2002

Reduce complexity hardware implementation of discrete wavelet transform for JPEG 2000 standardPhilip P. Dang, Paul M. Chau. icmcs 2002: 321-324 [doi]

Microarchitectural synthesis of performance-constrained, low-power VLSI designsLaurence Goodby, Alex Orailoglu, Paul M. Chau. todaes, 7(1):122-136, 2002. [doi]

2000

Image encryption for multimedia applicationsPhilip P. Dang, Paul M. Chau. cata 2000: 203-206

Robust image transmission over CDMA channelsPhilip P. Dang, Paul M. Chau. tce, 46(3):664-672, 2000. [doi]

Image encryption for secure Internet multimedia applicationsPhilip P. Dang, Paul M. Chau. tce, 46(3):395-403, 2000. [doi]

Hardware/software implementation 3-way algorithm for image encryptionPhilip P. Dang, Paul M. Chau. sswmc 2000: 274-285 [doi]

1999

A 1.2 GHz CMOS quadrature self-oscillating mixerMichael B. Bendak, Baernard A. Xavier, Paul M. Chau. iscas 1999: 434-437 [doi]

FPGA architecture for noise filters on a reconfigurable processorPhilip P. Dang, Paul M. Chau. cata 1999: 250-253

Reconfigurable Hardware for EncryptionJeremy Risher, Philip P. Dang, Paul M. Chau. appinf 1999: 554-557

1998

1996

A wire length estimation technique utilizing neighborhood density equationsTakeo Hamada, Chung-Kuan Cheng, Paul M. Chau. tcad, 15(8):912-922, 1996. [doi]

An extension to the SCI flow control protocol for increased network efficiencyDan Picker, Ronald D. Fellman, Paul M. Chau. ton, 4(1):71-85, 1996. [doi]

Casasent network density estimationAmir Sarajedini, Paul M. Chau. icnn 1996: 202-206 [doi]

1995

1994

Microarchitectural Synthesis of Performance-Constrained, Low-Power VLSI DesignsLaurence Goodby, Alex Orailoglu, Paul M. Chau. iccd 1994: 323-326

Rapid Prototyping of ASIC Based SystemsP. H. Kelly, Kevin J. Page, Paul M. Chau. dac 1994: 460-465 [doi]

1993

Recursive least squares problem implementation on a generalized interconnection of DSP processorsSati Banerjee, Paul M. Chau. icassp 1993: 575-578 [doi]

Parallel implementations of direction finding algorithms on networks of general purpose DSP processorsPaul M. Chau, Sati Banerjee. integration, 16(3):247-266, 1993. [doi]

::::Prime::::: A Timing-Driven Placement Tool using A Piecewise Linear Resistive Network ApproachTakeo Hamada, Chung-Kuan Cheng, Paul M. Chau. dac 1993: 531-536 [doi]

Enhancing SCI's fairness protocol for increased throughputDan Picker, Ronald D. Fellman, Paul M. Chau. icnp 1993: 292-299 [doi]

A Hybrid Radial Basis Function Neurocomputer and Its ApplicationsSteven S. Watkins, Paul M. Chau, Raoul Tawel, Bjorn Lambrigtsen, Mark Plutowski. nips 1994: 850-857 [doi]

Dynamic adaptation of quantization thresholds for soft-decision viterbi decoding with a reinforcement learning neural networkYu-jhih Wu, Michael D. Alston, Paul M. Chau. vlsisp, 6(1):77-84, 1993. [doi]

1992

1991

Hierarchical Modeling of the VLSI Design ProcessAmir K. Hekmatpour, Alex Orailoglu, Paul M. Chau. expert, 6(2):56-70, 1991. [doi]

A technique for realizing linear phase IIR filtersScott R. Powell, Paul M. Chau. tsp, 39(11):2425-2435, 1991. [doi]

1990

A neural network architecture for the decoding of long constraint length convolutional codesMichael D. Alston, Paul M. Chau. ijcnn 1990: 121-126 [doi]

KINFIDA: an object-oriented model-based digital filter design assistantAmir Hekmatpour, Scott R. Powell, Paul M. Chau. icassp 1990: 1069-1072 [doi]

1989

VLSI for a Physical Model of Musical Instruments OscillationsDavid Rivas, Steven S. Watkins, Paul M. Chau. icmc 1989: [doi]

1987

A bit-serial floating-point complex multiplier-accumulator for fault-tolerant digital signal processing arraysPaul M. Chau, Kay-Cheung Chew, Walter H. Ku. icassp 1987: 483-486 [doi]

1984

Digital signal processing capabilities of CUSP, a high performance bit-serial VLSI processorRichard W. Linderman, Peter P. Reusens, Paul M. Chau, Walter H. Ku. icassp 1984: 660-663 [doi]

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