Premachandran R. Menon - researchr alias

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2006

Design-specific path delay testing in lookup-table-based FPGAsPremachandran R. Menon, Weifeng Xu, Russell Tessier. tcad, 25(5):867-877, 2006. [doi]

2001

BIST-based delay path testing in FPGA architecturesIan G. Harris, Premachandran R. Menon, Russell Tessier. itc 2001: 932-938

Identification of primitive faults in combinational and sequentialcircuitsRamesh C. Tekumalla, Premachandran R. Menon. tcad, 20(12):1426-1442, 2001. [doi]

2000

On Redundant Path Delay Faults in Synchronous Sequential CircuitsRamesh C. Tekumalla, Premachandran R. Menon. TC, 49(3):277-282, 2000. [doi]

1999

Robust testability of primitive faults using test pointsRamesh C. Tekumalla, Premachandran R. Menon. itc 1999: 260-268

1998

On primitive fault test generation in non-scan sequential circuitsRamesh C. Tekumalla, Premachandran R. Menon. iccad 1998: 275-282 [doi]

1997

1996

Identifying Redundant Path Delay Faults in Sequential CircuitsRamesh C. Tekumalla, Premachandran R. Menon. vlsid 1996: 406-411 [doi]

1995

Multifault testability of delay-testable circuitsWuudiann Ke, Premachandran R. Menon. vts 1995: 400-409 [doi]

Delay-testable implementations of symmetric functionsWuudiann Ke, Premachandran R. Menon. tcad, 14(6):772-775, 1995. [doi]

Multifault and delay-fault testability of multilevel circuitsWuudiann Ke, Premachandran R. Menon. et, 6(3):333-336, 1995. [doi]

Path-delay-fault testable nonscan sequential circuitsWuudiann Ke, Premachandran R. Menon. tcad, 14(5):576-582, 1995. [doi]

Synthesis of Delay-Verifiable Combinational CircuitsWuudiann Ke, Premachandran R. Menon. TC, 44(2):213-222, 1995.

1994

1993

Acceleration of trace-based fault simulation of combinational circuitsOhyoung Song, Premachandran R. Menon. tcad, 12(9):1413-1419, 1993. [doi]

3-valued trace-based fault simulation of synchronous sequential circuitsOhyoung Song, Premachandran R. Menon. tcad, 12(9):1419-1424, 1993. [doi]

Divergence and scheduling in functional level concurrent fault simulationO. Y. Song, Bong-Hee Park, Premachandran R. Menon. tcad, 12(5):734-736, 1993. [doi]

1992

Redundancy removal and simplification of combinational circuitsPremachandran R. Menon, Hitesh Ahuja. vts 1992: 268-273 [doi]

1991

SCRIPT: a critical path tracing algorithm for synchronous sequential circuitsPremachandran R. Menon, Ytzhak H. Levendel, Miron Abramovici. tcad, 10(6):738-747, 1991. [doi]

Robustly Scan-Testable CMOS Sequential CircuitsBong-Hee Park, Premachandran R. Menon. itc 1991: 263-272

1990

Design of scan-testable CMOS sequential circuitsBong-Hee Park, Premachandran R. Menon. itc 1990: 369-376 [doi]

Parallel pattern fault simulation based on stem faults in combinational circuitsOhyoung Song, Premachandran R. Menon. itc 1990: 706-711 [doi]

1989

Symbolic Test Generation for Hierarchically Modeled Digital SystemsP. N. Anirudhan, Premachandran R. Menon. itc 1989: 461-469

An Approach to Functional Level Testability AnalysisC.-H. Chen, Premachandran R. Menon. itc 1989: 373-380

1988

Critical path tracing in sequential circuitsPremachandran R. Menon, Ytzhak H. Levendel, Miron Abramovici. iccad 1988: 162-165 [doi]

1986

Checkpoint Faults are not Sufficient Target Faults for Test GenerationMiron Abramovici, Premachandran R. Menon, David T. Miller. TC, 35(8):769-771, 1986.

SMART and FAST: Test Generation for VLSI Scan-Design CircuitsMiron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller. dt, 3(4):43-54, 1986. [doi]

1985

Test Generation In Lamp2: Concepts and AlgorithmsMiron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller. itc 1985: 49-56

Test Generation In Lamp2: System OverviewMiron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller. itc 1985: 45-48

A Practical Approach to Fault Simulation and Test Generation for Bridging FaultsMiron Abramovici, Premachandran R. Menon. TC, 34(7):658-663, 1985.

1983

1982

A logic simulation machineMiron Abramovici, Ytzhak H. Levendel, Premachandran R. Menon. isca 1982: 148-157 [doi]

A logic simulation machineMiron Abramovici, Ytzhak H. Levendel, Premachandran R. Menon. dac 1982: 65-73 [doi]

Test Generation Algorithms for Computer Hardware Description LanguagesYtzhak H. Levendel, Premachandran R. Menon. TC, 31(7):577-588, 1982.

1978

Deductive Fault Simulation with Functional BlocksPremachandran R. Menon, Stephen G. Chappell. TC, 27(8):689-695, 1978.

1976

Functional simulation in the lamp systemStephen G. Chappell, Premachandran R. Menon, J. F. Pellegrin, A. M. Schowe. dac 1976: 42-47 [doi]

1973

Restricted Checking Sequences for Sequential MachinesArthur D. Friedman, Premachandran R. Menon. TC, 22(4):397-399, 1973. [doi]

1972

Comments on "Design of Diagnosable Iterative Arrays"Arthur D. Friedman, Premachandran R. Menon. TC, 21(5):511, 1972. [doi]

1971

Systems of Asynchronously Operating ModulesArthur D. Friedman, Premachandran R. Menon. TC, 20(1):100-104, 1971. [doi]

Fault Detection in Iterative Logic ArraysPremachandran R. Menon, Arthur D. Friedman. TC, 20(5):524-535, 1971. [doi]

1969

Design of Asynchronous Circuits Assuming Unbounded Gate DelaysDouglas B. Armstrong, Arthur D. Friedman, Premachandran R. Menon. TC, 18(12):1110-1120, 1969. [doi]

Design of Generalized Double Rank and Multiple Rank Sequential CircuitsArthur D. Friedman, Premachandran R. Menon. iandc, 15(5):436-451, November 1969.

On Sequential Machine Decompositions for Reducing the Number of Delay ElementsPremachandran R. Menon. iandc, 15(3):274-287, September 1969.

Structural Simplification and Decomposition of Asynchronous Sequential CircuitsChung-Jen Tan, Premachandran R. Menon, Arthur D. Friedman. TC, 18(9):830-838, 1969. [doi]

1968

Realization of Asynchronous Sequential Circuits Without Inserted Delay ElementsDouglas B. Armstrong, Arthur D. Friedman, Premachandran R. Menon. TC, 17(2):129-134, 1968. [doi]

Synthesis of Asynchronous Sequential Circuits with Multiple-Input ChangesArthur D. Friedman, Premachandran R. Menon. TC, 17(6):559-566, 1968. [doi]

Structural Simplification and Decomposition of Asynchronous Sequential CircuitsC. J. Tan, Premachandran R. Menon, Arthur D. Friedman. focs 1968: 7-19

1967

Synthesis of Asynchronous Sequential Circuits with Minimum Number of Delay ElementsD. B. Armstrong, Arthur D. Friedman, Premachandran R. Menon. focs 1967: 95-105

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