Sartaj K. Sahni - researchr alias

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Viewing Publication 1 - 21 from 21

2022

Algorithms for optimal min hop and foremost paths in interval temporal graphsAnuj Jain, Sartaj K. Sahni. ans, 7(1):60, 2022. [doi]

2021

AnnouncementOscar H. Ibarra, Sartaj K. Sahni. ijfcs, 32(7):825, 2021. [doi]

2016

AnnouncementFrancis Y. L. Chin, Oscar H. Ibarra, Sartaj K. Sahni. ijfcs, 27(8):895-896, 2016. [doi]

2013

Dynamic multistatic synthetic aperture radar (DMSAR) with image reconstruction algorithms and analysisGuna Seetharaman, Eric T. Hayden, Mark S. Schmalz, William Chapman, Sanjay Ranka, Sartaj K. Sahni. aipr 2013: 1-9 [doi]

2005

Prefix and Interval-Partitioned Dynamic IP Router-TablesHaibin Lu, Kun Suk Kim, Sartaj K. Sahni. TC, 54(5):545-557, 2005. [doi]

Packet classification consuming small amount of memoryXuehong Sun, Sartaj K. Sahni, Yiqiang Q. Zhao. ton, 13(5):1135-1145, 2005. [doi]

2004

A B-tree dynamic router-table designHaibin Lu, Sartaj K. Sahni. ISCC 2004: 840-845 [doi]

Dynamic IP router-tables using highest-priority matchingHaibin Lu, Sartaj K. Sahni. ISCC 2004: 858-863 [doi]

Fast Update Algorithm for IP Forwarding Table Using Independent SetsXuehong Sun, Sartaj K. Sahni, Yiqiang Q. Zhao. hsnmc 2004: 324-335 [doi]

2001

A Fast Algorithm for Transistor FoldingEdward Y. C. Cheng, Sartaj K. Sahni. vlsi, 2001(1):53-60, 2001. [doi]

1997

Models, techniques, and algorithms for finding, selecting, and displaying patterns in strings and other discrete objectsDinesh P. Mehta, Sartaj K. Sahni. jss, 39(3):201-221, 1997. [doi]

1996

Efficient net extraction for restricted orientation designs [VLSI layout]Mario A. Lopez, Ravi Janardan, Sartaj K. Sahni. tcad, 15(9):1151-1159, 1996. [doi]

1995

A fast algorithm to test planar topological routabilityAndrew Lim, Sartaj K. Sahni, Venkat Thanvantri. vlsid 1995: 8-12 [doi]

1994

Folding a stack of equal width componentsVenkat Thanvantri, Sartaj K. Sahni. iccad 1994: 432-435 [doi]

1993

A fast algorithm for VLSI net extractionMario A. Lopez, Ravi Janardan, Sartaj K. Sahni. iccad 1993: 770-774 [doi]

1989

On path selection in combinational logic circuitsWing Ning Li, Sudhakar M. Reddy, Sartaj K. Sahni. tcad, 8(1):56-63, 1989. [doi]

1988

Fast algorithm for polygon decompositionSurendra Nahar, Sartaj K. Sahni. tcad, 7(4):473-483, 1988. [doi]

Two NP-hard interchangeable terminal problemsSartaj K. Sahni, San-Yuan Wu. tcad, 7(4):467-472, 1988. [doi]

1987

Layering Algorithms For Single-Row RoutingSangyong Han, Sartaj K. Sahni. tcad, 6(1):95-102, 1987. [doi]

A Systolic Design-Rule CheckerRajiv Kane, Sartaj K. Sahni. tcad, 6(1):22-32, 1987. [doi]

1986

VLSI Architectures for the Finite Impulse Response FilterKam Cheng, Sartaj K. Sahni. jsac, 4(1):92-99, 1986. [doi]

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