Seiya Kasai - researchr alias

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Viewing Publication 1 - 18 from 18

2021

Resource-saving FPGA Implementation of the Satisfiability Problem Solver: AmoebaSATslimYing Jie Yan, Hideharu Amano, Masashi Aono, Kaori Ohkoda, Shingo Fukuda, Kenta Saito, Seiya Kasai. fpt 2021: 1-5 [doi]

2018

Amoeba-Inspired Electronic Solution-Searching System and Its Application to Finding Walking Maneuver of a Multi-legged RobotKenta Saito, Naoki Suefuji, Seiya Kasai, Masashi Aono. ismvl 2018: 127-131 [doi]

Amoeba-inspired Electronic Computing System and its Application to Autonomous Walking of a Multi-legged RobotKenta Saito, Naoki Suefuji, Seiya Kasai, Masashi Aono. flap, 5(9):1799-1814, 2018. [doi]

2017

Implementation of a noise-coexistence threshold logic architecture on a GaAs-based nanowire FET networkRyota Kuroda, Seiya Kasai. paapp, 32(3):287-294, 2017. [doi]

2016

Design Framework of Image Sensor System Based on Dynamic Range Extension by Adding Noise for Saturated ConditionsYukihiro Tadokoro, Seiya Kasai, Akihisa Ichiki, Hiroya Tanaka. tsmc, 46(8):1121-1128, 2016. [doi]

2015

Concept, analysis, and demonstration of a novel delay network exhibiting stochastic resonance induced by external noiseYukihiro Tadokoro, Seiya Kasai, Akihisa Ichiki. dsp, 37:1-12, 2015. [doi]

Analysis on Non-Ideal Nonlinear Characteristics of Graphene-Based Three-Branch Nano-Junction DeviceXiang Yin, Masaki Sato, Seiya Kasai. ieicet, 98-C(5):434-438, 2015. [doi]

2013

Noise-Tolerant Model of a Ternary Inverter Based on Markov Random FieldGolam Tangim, Svetlana N. Yanushkevich, Seiya Kasai, Vlad P. Shmerko. ismvl 2013: 278-283 [doi]

Introduction to Noise-Resilient ComputingSvetlana N. Yanushkevich, Seiya Kasai, Golam Tangim. Synthesis Lectures on Digital Circuits and Systems, Morgan & Claypool Publishers, 2013. [doi]

2009

Investigation on Stochastic Resonance in Quantum Dot and Its Summing NetworkSeiya Kasai. ijnmc, 1(2):70-79, 2009. [doi]

Multi-path Switching Device Utilizing a Multi-terminal Nanowire Junction for MDD-Based Logic CircuitSeiya Kasai, Yuta Shiratori, Kensuke Miura, Nan-Jian Wu. ismvl 2009: 331-336 [doi]

Multiple-Valued Logic Gates Using Asymmetric Single-Electron TransistorsWancheng Zhang, Nan-Jian Wu, Tamotsu Hashizume, Seiya Kasai. ismvl 2009: 337-342 [doi]

2008

Fabrication and Characterization of Active and Sequential Circuits Utilizing Schottky-Wrap-Gate-Controlled GaAs Hexagonal Nanowire Network StructuresHong-Quan Zhao, Seiya Kasai, Tamotsu Hashizume, Nan-Jian Wu. ieicet, 91-C(7):1063-1069, 2008. [doi]

2007

2006

Future of Heterostructure Microelectronics and Roles of Materials Research for Its ProgressHideki Hasegawa, Seiya Kasai, Taketomo Sato, Tamotsu Hashizume. ieicet, 89-C(7):874-882, 2006. [doi]

2005

III-V Compound Semiconductor Nanotechnology for Smart SystemsHideki Hasegawa, Seiya Kasai. icmens 2005: 399 [doi]

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