Shiro Sakiyama - researchr alias

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Viewing Publication 1 - 12 from 12

2015

A 4.2 mW 50 MS/s 13 bit CMOS SAR ADC With SNR and SFDR Enhancement TechniquesTakuji Miki, Takashi Morie, Kazuo Matsukawa, Yoji Bando, Takeshi Okumoto, Koji Obata, Shiro Sakiyama, Shiro Dosho. jssc, 50(6):1372-1381, 2015. [doi]

2013

A 71dB-SNDR 50MS/s 4.2mW CMOS SAR ADC by SNR enhancement techniques utilizing noiseTakashi Morie, Takuji Miki, Kazuo Matsukawa, Yoji Bando, Takeshi Okumoto, Koji Obata, Shiro Sakiyama, Shiro Dosho. isscc 2013: 272-273 [doi]

2012

A Low Distortion 3rd-Order Continuous-Time Delta-Sigma Modulator for a Worldwide Digital TV-ReceiverKoji Obata, Kazuo Matsukawa, Yosuke Mitani, Masao Takayama, Yusuke Tokunaga, Shiro Sakiyama, Shiro Dosho. ieicet, 95-A(2):471-478, 2012. [doi]

2010

rd-order Continuous Time Delta-Sigma Modulator with an Ultimate Low Power Tuning System for a Worldwide Digital TV-ReceiverKazuo Matsukawa, Yosuke Mitani, Masao Takayama, Koji Obata, Yusuke Tokunaga, Shiro Sakiyama, Shiro Dosho. cicc 2010: 1-4 [doi]

An On-Chip CMOS Relaxation Oscillator With Voltage Averaging FeedbackYusuke Tokunaga, Shiro Sakiyama, Akinori Matsumoto, Shiro Dosho. jssc, 45(6):1150-1158, 2010. [doi]

2009

2008

A Design Method and Developments of a Low-Power and High-Resolution Multiphase Generation SystemAkinori Matsumoto, Shiro Sakiyama, Yusuke Tokunaga, Takashi Morie, Shiro Dosho. jssc, 43(4):831-843, 2008. [doi]

2006

A PLL for a DVD-16 Write System with 63 Output Phases and 32ps ResolutionShiro Dosho, Shiro Sakiyama, Noriaki Takeda, Yusuke Tokunaga, Takashi Morie. isscc 2006: 2422-2431 [doi]

2 9mW Wide-Range Duty-Cycle Correcting False-Lock-Free DLL with Fully Balanced Charge-Pump for DDR InterfaceYusuke Tokunaga, Shiro Sakiyama, Shiro Dosho, Y. Doi, M. Hattori. isscc 2006: 1286-1295 [doi]

2005

Mixed body bias techniques with fixed V/sub t/ and I/sub ds/ generation circuitsMasaya Sumita, Shiro Sakiyama, Masayoshi Kinoshita, Yuta Araki, Yuichiro Ikeda, Kohei Fukuoka. jssc, 40(1):60-66, 2005. [doi]

1994

Quantizer neuron model and neuroprocessor-named quantizer neuron chipSusumu Maruno, Toshiyuki Kohda, Hiroyuki Nakahira, Shiro Sakiyama, Masakatsu Maruyama. jsac, 12(9):1503-1509, 1994. [doi]

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