Tun Zainal Azni Zulkifli - researchr alias

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Viewing Publication 1 - 8 from 8

2020

Ultra-low-voltage integrable electronic implementation of delayed inertial neural networks for complex dynamical behavior using multiple activation functionsFarooq Ahmad Khanday, Mohammad Rafiq Dar, Nasir Ali Kant, Tun Zainal Azni Zulkifli, Costas Psychalinos. nca, 32(12):8297-8314, 2020. [doi]

Carbon Nanotube and Resistive Random Access Memory Based Unbalanced Ternary Logic Gates and Basic Arithmetic CircuitsFurqan Zahoor, Tun Zainal Azni Zulkifli, Farooq Ahmad Khanday, Sohiful Anuar Zainol Murad. access, 8:104701-104717, 2020. [doi]

2019

Low-Voltage Low-Power Integrable CMOS Circuit Implementation of Integer- and Fractional-Order FitzHugh-Nagumo Neuron ModelFarooq Ahmad Khanday, Nasir Ali Kant, Mohammad Rafiq Dar, Tun Zainal Azni Zulkifli, Costas Psychalinos. tnn, 30(7):2108-2122, 2019. [doi]

2017

A 2.4/5.2-GHz Concurrent Dual-Band CMOS Low Noise AmplifierSami Sattar, Tun Zainal Azni Zulkifli. access, 5:21148-21156, 2017. [doi]

2014

A 1.6 ppm/°C bandgap voltage reference for an extended operating temperature rangeRuhaifi Abdullah Zawawi, Tun Zainal Azni Zulkifli. ieiceee, 11(12):20140383, 2014. [doi]

2010

A general on-wafer noise figure de-embedding technique with gain uncertainty analysisShukri Korakkottil Kunhi Mohd, Tun Zainal Azni Zulkifli, Othman Sidek. ieiceee, 7(4):302-307, 2010. [doi]

A 24mW, 5Gb/s fully balanced differential output trans-impedance amplifier with active inductor and capacitive degeneration techniques in 0.18µm CMOS technologyBalasubramaniam Shammugasamy, Tun Zainal Azni Zulkifli, Harikrishnan Ramiah. ieiceee, 7(4):308-313, 2010. [doi]

2008

A 10-Gb/s fully balanced differential output transimpedance amplifier in 0.18-μm CMOS technology for SDH/SONET applicationBalasubramaniam Shammugasamy, Tun Zainal Azni Zulkifli. apccas 2008: 684-687 [doi]

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