Wolfgang Günther - researchr alias

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Viewing Publication 1 - 59 from 59

2014

Mobile Kommunikation über LTEWolfgang Günther. BIRTHDAY 2014: 11-16

2006

Orthogonal Hypergraph Drawing for Improved VisibilityThomas Eschbach, Wolfgang Günther, Bernd Becker. jgaa, 10(2):141-157, 2006. [doi]

2005

Combining ordered best-first search with branch and bound for exact BDD minimizationRüdiger Ebendt, Wolfgang Günther, Rolf Drechsler. tcad, 24(10):1515-1529, 2005. [doi]

Orthogonal Circuit Visualization Improved by Merging the Placement and Routing PhasesThomas Eschbach, Wolfgang Günther, Bernd Becker. vlsid 2005: 433-438 [doi]

2004

2003

Recursive bi-partitioning of netlists for large number of partitionsRolf Drechsler, Wolfgang Günther, Thomas Eschbach, Lothar Linhard, Gerhard Angst. jsa, 49(12-15):521-528, 2003. [doi]

Combination of Lower Bounds in Exact BDD MinimizationRüdiger Ebendt, Wolfgang Günther, Rolf Drechsler. date 2003: 10758-10763 [doi]

An improved branch and bound algorithm for exact BDD minimizationRüdiger Ebendt, Wolfgang Günther, Rolf Drechsler. tcad, 22(12):1657-1663, 2003. [doi]

Cross Reduction for Orthogonal Circuit VisualizationThomas Eschbach, Wolfgang Günther, Bernd Becker. vlsi 2003: 107-113

Efficient Minimization and Manipulation of Linearly Transformed Binary Decision DiagramsWolfgang Günther, Rolf Drechsler. TC, 52(9):1196-1209, 2003. [doi]

The Case for 2-POFIlia Polian, Wolfgang Günther, Bernd Becker. mbmv 2003: 164-173

Pattern-based verification of connections to intellectual property coresIlia Polian, Wolfgang Günther, Bernd Becker. integration, 35(1):25-44, 2003. [doi]

2002

2001

Greedy_IIP: Partitioning Large Graphs by Greedy Iterative ImprovementBernd Becker, Thomas Eschbach, Rolf Drechsler, Wolfgang Günther. dsdm 2001: 54-61 [doi]

Level Assignment for Displaying Combinational LogicRolf Drechsler, Wolfgang Günther, Lothar Linhard, Gerhard Angst. dsdm 2001: 148-151 [doi]

History-based dynamic BDD minimizationRolf Drechsler, Wolfgang Günther. integration, 31(1):51-63, 2001. [doi]

Using lower bounds during dynamic BDD minimizationRolf Drechsler, Wolfgang Günther, Fabio Somenzi. tcad, 20(1):51-57, 2001. [doi]

Application of linearly transformed BDDs in sequential verificationWolfgang Günther, Andreas Hett, Bernd Becker. aspdac 2001: 91-96 [doi]

Minimierung von Entscheidungsdiagrammen und Anwendungen im SchaltkreisentwurfWolfgang Günther. PhD thesis, University of Freiburg, Freiburg im Breisgau, Germany, 2001. [doi]

Performance Driven Optimization for MUX based FPGAsWolfgang Günther, Rolf Drechsler. vlsid 2001: 311-316 [doi]

Implementation of Read- k-times BDDs on Top of Standard BDD PackagesWolfgang Günther, Rolf Drechsler. vlsid 2001: 173-178 [doi]

Efficient Pattern-Based Verification of Connections to IP Cores Ilia Polian, Wolfgang Günther, Bernd Becker. ats 2001: 443-448 [doi]

Efficient Pattern-Based Verification of Connections to Intellectual Property CoresIlia Polian, Wolfgang Günther, Bernd Becker. mbmv 2001: 111-120

Selection of Efficient Re-Ordering Heuristics for MDD ConstructionFrank Schmiedle, Wolfgang Günther, Rolf Drechsler. ismvl 2001: 299-304

2000

Evolutionary Synthesis of Multiplexor Circuits under Hardware ConstraintsRolf Drechsler, Wolfgang Günther. gecco 2000: 513-518

Optimization of sequential verification by history-based dynamic minimization of BDDsRolf Drechsler, Wolfgang Günther. iscas 2000: 737-740 [doi]

Testability of Circuits Derived from Lattice DiagramsRolf Drechsler, Wolfgang Günther, Bernd Becker. euromicro 2000: 1188-1192 [doi]

Fast exact minimization of BDD sRolf Drechsler, Nicole Drechsler, Wolfgang Günther. tcad, 19(3):384-389, 2000. [doi]

::::k::::-Layer Straightline Crossing Minimization by Speeding Up SiftingWolfgang Günther, Robby Schönfeld, Bernd Becker, Paul Molitor. gd 2001: 253-258 [doi]

Efficient Dynamic Minimization of Word-Level DDs Based on Lower Bound ComputationWolfgang Günther, Rolf Drechsler, Stefan Höreth. iccd 2000: 383-388 [doi]

Verification of Designs Containing Black BoxesWolfgang Günther, Nicole Drechsler, Rolf Drechsler, Bernd Becker. mbmv 2000: 19-26

ACTion: Combining Logic Synthesis and Technology Mapping for MUX Based FPGAsWolfgang Günther, Rolf Drechsler. euromicro 2000: 1130-1137 [doi]

Verification of Designs Containing Black BoxesWolfgang Günther, Nicole Drechsler, Rolf Drechsler, Bernd Becker. euromicro 2000: 1100-1105 [doi]

Improving EAs for Sequencing ProblemsWolfgang Günther, Rolf Drechsler. gecco 2000: 175-180

On the computational power of linearly transformed BDDsWolfgang Günther, Rolf Drechsler. ipl, 75(3):119-125, 2000. [doi]

Lower Bound Sifting for MDDsDragan Jankovic, Wolfgang Günther, Rolf Drechsler. ismvl 2000: 193-198 [doi]

Dynamic Re-Encoding During MDD MinimizationFrank Schmiedle, Wolfgang Günther, Rolf Drechsler. ismvl 2000: 239-244 [doi]

A Method for Approximate Equivalence CheckingMitchell A. Thornton, Rolf Drechsler, Wolfgang Günther. ismvl 2000: 447-452 [doi]

1999

History-Based Dynamic Minimization During BDD ConstructionRolf Drechsler, Wolfgang Günther. ifip10-5 2000: 334-345

Generation of Optimal Universal Logic ModulesRolf Drechsler, Wolfgang Günther. euromicro 1999: 1080-1085 [doi]

Using Lower Bounds During Dynamic BDD MinimizationRolf Drechsler, Wolfgang Günther. dac 1999: 29-32 [doi]

Efficient Graph Coloring by Evolutionary AlgorithmsNicole Drechsler, Wolfgang Günther, Rolf Drechsler. fuzzy 1999: 30-39

Efficient manipulation algorithms for linearly transformed BDDsWolfgang Günther, Rolf Drechsler. iccad 1999: 50-54 [doi]

Creating hard problem instances in logic synthesis using exact minimizationWolfgang Günther, Rolf Drechsler. iscas 1999: 436-439 [doi]

Minimization of BDDs using linear transformations based on evolutionary techniquesWolfgang Günther, Rolf Drechsler. iscas 1999: 387-390 [doi]

Minimization of Free BDDsWolfgang Günther, Rolf Drechsler. aspdac 1999: 323-326 [doi]

1998

Fast Exact Minimization of BDDsRolf Drechsler, Nicole Drechsler, Wolfgang Günther. dac 1998: 200-205 [doi]

Linear Transformations and Exact Minimization of BDDsWolfgang Günther, Rolf Drechsler. glvlsi 1998: 325-330 [doi]

1993

Erfahrungen bei objektorientierter SW-Entwicklung für ein großes Prjekt: 10 ThesenStefan Geyer, Wolfgang Günther, Siegfried Paul. gi 1993: 433-438

Anwendung der Objektorientierung in einem industriellen TelekommunikationsprojektWolfgang Günther, Jürgen F. H. Winkler. insk, 16(6):341-348, 1993.

1988

Entwicklung einer offenen Fachsprache für ein freiprogrammierbares Steuer- und Regelgerät auf MikroprozessorbasisWolfgang Günther. PhD thesis, Technische Hochschule Magdeburg, Germany, 1988. [doi]

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2014

2006

2005

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2002

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2000

1999

1998

1993

1988

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