Yoshio Kameda - researchr alias

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Viewing Publication 1 - 9 from 9

2023

Quantitative Decomposition of Prediction Errors Revealing Multi-Cause Impacts: An Insightful Framework for MLOpsKeita Sakuma, Ryuta Matsuno, Yoshio Kameda. CIKM 2023: 4259-4263 [doi]

A Method of Identifying Causes of Prediction Errors to Accelerate MLOpsKeita Sakuma, Ryuta Matsuno, Yoshio Kameda. icse-deeptest 2023: 9-16 [doi]

2018

A Rare and Critical Condition Search Technique and its Application to Telescope Stray Light AnalysisKeiichi Kisamori, Takashi Washio, Yoshio Kameda, Ryohei Fujimaki. sdm 2018: 567-575 [doi]

2008

Development of Cryopackaging and I/O Technologies for High-Speed Superconductive Digital SystemsYoshihito Hashimoto, Shinichi Yorozu, Yoshio Kameda. ieicet, 91-C(3):325-332, 2008. [doi]

Design and Demonstration of a 4×4 SFQ Network Switch Prototype System and 10-Gbps Bit-Error-Rate MeasurementYoshio Kameda, Yoshihito Hashimoto, Shinichi Yorozu. ieicet, 91-C(3):333-341, 2008. [doi]

2005

Development of Passive Interconnection Technology for SFQ CircuitsYoshihito Hashimoto, Shinichi Yorozu, Yoshio Kameda, Akira Fujimaki, Hirotaka Terai, Nobuyuki Yoshikawa. ieicet, 88-C(2):198-207, 2005. [doi]

1998

Primitive-Level Pipelining Method on Delay-Insensitive Model for RSFQ Pulse-Driven LogicYoshio Kameda, Stanislav Polonsky, Masaaki Maezawa, Takashi Nanya. async 1998: 262-273 [doi]

1996

Pulse-Driven Delay-Insensitive Circuits using Single-Flux-Quantum DevicesYoshio Kameda. iccd 1996: 419-425 [doi]

Pulse-driven dual-rail logic gate family based on rapid single-flux-quantum (RSFQ) devices for asynchronous circuitsMasaaki Maezawa, Itaru Kurosawa, Yoshio Kameda, Takashi Nanya. async 1996: 134-142 [doi]

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