Zoltan Huszka - researchr alias

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Viewing Publication 1 - 3 from 3

2019

Suppressing derivatives of selected variables in Verilog-AZoltan Huszka, Kund Molnar. ijcta, 47(5):805-811, 2019. [doi]

2016

Implementation and quality testing for compact models implemented in Verilog-AAnindya Mukherjee, Andreas Pawlak, Michael Schroter, Didier Celi, Zoltan Huszka. date 2016: 403-408 [doi]

2009

Bipolar Transistor Excess Phase Modeling in Verilog-AColin C. McAndrew, Zoltan Huszka, Geoffrey J. Coram. jssc, 44(9):2267-2275, 2009. [doi]

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