@article{agostinelli2010,
  title = {Leakage-Delay Tradeoff in FinFET Logic Circuits: a Comparative Analysis with Bulk Technology},
  author = {Matteo Agostinelli and Massimo Alioto and David Esseni and Luca Selmi},
  year = {2010},
  month = {Feb},
  doi = {10.1109/TVLSI.2008.2009633},
  tags = {power consumption, FinFET, layout, analysis, logic, abstraction, Digital design, systematic-approach},
  researchr = {https://researchr.org/publication/agostinelli2010},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {18},
  number = {2},
}

@inproceedings{AgostinelliAES08,
  title = {Design and Evaluation of Mixed 3T-4T FinFET Stacks for Leakage Reduction},
  author = {Matteo Agostinelli and Massimo Alioto and David Esseni and Luca Selmi},
  year = {2008},
  doi = {10.1007/978-3-540-95948-9_4},
  url = {http://dx.doi.org/10.1007/978-3-540-95948-9_4},
  tags = {FinFET, design},
  researchr = {https://researchr.org/publication/AgostinelliAES08},
  cites = {0},
  citedby = {0},
  pages = {31-41},
  booktitle = {patmos},
}