publications: - title: "Simulazioni miste dispositivo-circuito per il confronto di tecniche circuitali a basso consumo in tecnologie avanzate di tipo SOI e Bulk" author: - name: "Matteo Agostinelli" link: "http://wwwu.uni-klu.ac.at/magostin/" year: "2006" tags: - "e-science" researchr: "https://researchr.org/publication/agostinelli06" cites: 0 citedby: 0 advisor: - name: "David Esseni" link: "www.diegm.uniud.it/esseni" - name: "Massimo Alioto" link: "www.dii.unisi.it/~malioto" - name: "Pierpaolo Palestri" link: "www.diegm.uniud.it" - name: "Luca Selmi" link: "www.diegm.uniud.it/selmi" kind: "mastersthesis" key: "agostinelli06" - title: "Design and Evaluation of Mixed 3T-4T FinFET Stacks for Leakage Reduction" author: - name: "Matteo Agostinelli" link: "http://wwwu.uni-klu.ac.at/magostin/" - name: "Massimo Alioto" link: "www.dii.unisi.it/~malioto" - name: "David Esseni" link: "www.diegm.uniud.it/esseni" - name: "Luca Selmi" link: "www.diegm.uniud.it/selmi" year: "2008" doi: "http://dx.doi.org/10.1007/978-3-540-95948-9_4" links: doi: "http://dx.doi.org/10.1007/978-3-540-95948-9_4" tags: - "FinFET" - "design" researchr: "https://researchr.org/publication/AgostinelliAES08" cites: 0 citedby: 0 pages: "31-41" booktitle: "patmos" kind: "inproceedings" key: "AgostinelliAES08" - title: "Leakage-Delay Tradeoff in FinFET Logic Circuits: a Comparative Analysis with Bulk Technology" author: - name: "Matteo Agostinelli" link: "http://wwwu.uni-klu.ac.at/magostin/" - name: "Massimo Alioto" link: "www.dii.unisi.it/~malioto" - name: "David Esseni" link: "www.diegm.uniud.it/esseni" - name: "Luca Selmi" link: "www.diegm.uniud.it/selmi" year: "2010" month: "Feb" doi: "10.1109/TVLSI.2008.2009633" abstract: "In this paper, we study the advantages offered by multi-gate fin FETs (FinFETs) over traditional bulk MOSFETs when low standby power circuit techniques are implemented. More precisely, we simulated various vehicle circuits, ranging from ring oscillators to mirror full adders, to investigate the effectiveness of back biasing and transistor-stacking in both FinFETs and bulk MOSFETs. The opportunity to separate the gates of FinFETs and to operate them independently has been systematically analyzed; mixed connected- and independent-gate circuits have also been evaluated. The study spans over the device, the layout, and the circuit level of abstraction and appropriate figures of merit are introduced to quantify the potential advantage of different schemes. Our results show that, thanks to a larger threshold voltage sensitivity to back biasing, the FinFET technology is able to offer a more favorable compromise between standby power consumption and dynamic performance and is well suited for implementing fast and energy-efficient adaptive back-biasing strategies." tags: - "power consumption" - "FinFET" - "layout" - "analysis" - "logic" - "abstraction" - "Digital design" - "systematic-approach" researchr: "https://researchr.org/publication/agostinelli2010" cites: 0 citedby: 0 journal: "IEEE Trans. VLSI Syst." volume: "18" number: "2" kind: "article" key: "agostinelli2010" - title: "SystemC-AMS modeling and simulation of digitally controlled DC-DC converters" author: - name: "Matteo Agostinelli" link: "http://wwwu.uni-klu.ac.at/magostin/" - name: "Robert Priewasser" link: "http://www.uni-klu.ac.at/tewi/ict/nes/es/staff/index.html" - name: "Stefano Marsili" link: "www.infineon.com" - name: "Dietmar Straeussnigg" link: "www.infineon.com" - name: "Mario Huemer" link: "http://www.uni-klu.ac.at/tewi/ict/nes/es/staff/index.html" year: "2010" month: "Feb." doi: "10.1109/APEC.2010.5433676" tags: - "modeling" - "systemc" - "power electronics" - "dc-dc" researchr: "https://researchr.org/publication/agostinelli10" cites: 0 citedby: 0 booktitle: "SystemC-AMS modeling and simulation of digitally controlled DC-DC converters" conference: "APEC" kind: "proceedings" key: "agostinelli10"