publications: - title: "A Voltage-Mode Sample and Hold Circuit Based on the Switched Op-Amp Techniques" author: - name: "Mohammad Rashtian" link: "http://www.catc.ac.ir/rashtian" - name: " Omid Hashemipour and Keivan Navi" link: "https://researchr.org/alias/omid-hashemipour-and-keivan-navi" - name: " " link: "https://researchr.org/alias/" year: "2008" month: "June" tags: - "rule-based" researchr: "https://researchr.org/publication/Rashtianand-Keivan-Navi2008-0" cites: 0 citedby: 0 journal: "World Journal of Applied Science" volume: "4" number: "2" pages: "266-269" kind: "article" key: "Rashtianand-Keivan-Navi2008-0" - title: "Design of A Low-Voltage High-Speed Switched-Capacitor Filters Using Improved Auto Zeroed Integrator" author: - name: "Mohammad Rashtian" link: "http://www.catc.ac.ir/rashtian" - name: " Omid Hashemipour and Keivan Navi" link: "https://researchr.org/alias/omid-hashemipour-and-keivan-navi" - name: " " link: "https://researchr.org/alias/" year: "2008" month: "April" doi: "10.3923/jas.2008.1771.1775 " tags: - "design" researchr: "https://researchr.org/publication/Rashtianand-Keivan-Navi2008" cites: 0 citedby: 0 journal: "Journal of Applied Science" volume: "7" number: "9" pages: "1771-1775" kind: "article" key: "Rashtianand-Keivan-Navi2008" - title: "High Speed Capacitor-Inverter Based Carbon Nanotube Full Adder" author: - name: "Keivan Navi" link: "http://ece.sbu.ac.ir/Desktopmodules/Sbu_ProfessorsPage/SP.aspx?userid=771" - name: "Mohammad Rashtian" link: "http://www.catc.ac.ir/rashtian" - name: "Khatir, A" link: "https://researchr.org/alias/khatir%2C-a" - name: "Keshavarzian, P" link: "https://researchr.org/alias/keshavarzian%2C-p" - name: "Hashemipour, O" link: "https://researchr.org/alias/hashemipour%2C-o" year: "2010" doi: "10.1007/s11671-010-9575-4" abstract: "Carbon Nanotube filed-effect transistor (CNFET) is one of the promising alternatives to the MOS transistors. The geometry-dependent threshold voltage is one of the CNFET characteristics, which is used in the proposed Full Adder cell. In this paper, we present a high speed Full Adder cell using CNFETs based on majority-not (Minority) function. Presented design uses eight transistors and eight capacitors. Simulation results show significant improvement in terms of delay and power-delay product in comparison to contemporary CNFET Adder Cells. Simulations were carried out using HSPICE based on CNFET model with 0.6 V VDD." tags: - "rule-based" - "meta-model" - "Meta-Environment" - "design" researchr: "https://researchr.org/publication/20671796" cites: 0 citedby: 0 journal: "Nanoscale Research Letters" volume: "5" number: "5" pages: "859-862" kind: "article" key: "20671796"