publications:
- title: "Frequent Item Computation on a Chip"
  author:
  - name: "Jens Teubner"
    link: "http://people.inf.ethz.ch/jteubner/"
  - name: "René Müller"
    link: "http://www.systems.ethz.ch/people/muellren"
  - name: "Gustavo Alonso"
    link: "http://www.systems.ethz.ch/people/alonso"
  year: "2011"
  doi: "http://dx.doi.org/10.1109/TKDE.2010.216"
  abstract: "Computing frequent items is an important problem by itself and as a sub-routine in several data mining algorithms. In this paper we explore how to accelerate the computation of frequent items using field-programmable gate arrays (FPGAs) with a threefold goal: increase performance over existing solutions, reduce energy consumption over CPU-based systems, and explore the design space in detail as the constraints on FPGAs are very different from those of traditional software-based systems.  We discuss three design alternatives, each one of them exploiting different FPGA features and each one providing different performance/scalability trade-offs. An important result of the paper is to demonstrate how the inherent massive parallelism of FPGAs can improve performance of existing algorithms but only after a fundamental redesign of the algorithms. Our experimental results show that, e.g., the pipelined solution we introduce can reach more than 100 million tuples per second of sustained throughput (four times the best available results to date) by making use of techniques that are not available to CPU-based solutions. Moreover, and unlike in software approaches, the high throughput is independent of the skew of the Zipf distribution of the input and at a far lower energy cost. "
  links:
    doi: "http://dx.doi.org/10.1109/TKDE.2010.216"
    dblp: "http://dblp.uni-trier.de/rec/bibtex/journals/tkde/TeubnerMA11"
  tags:
  - "rule-based"
  - "constraints"
  - "data-flow programming"
  - "data-flow"
  - "design"
  - "systematic-approach"
  researchr: "https://researchr.org/publication/TeubnerMA11"
  cites: 21
  citedby: 0
  journal: "IEEE Trans. Knowl. Data Eng."
  volume: "23"
  number: "8"
  pages: "1169-1181"
  kind: "article"
  key: "TeubnerMA11"
- title: "How soccer players would do stream joins"
  author:
  - name: "Jens Teubner"
    link: "http://people.inf.ethz.ch/jteubner/"
  - name: "René Müller"
    link: "http://www.systems.ethz.ch/people/muellren"
  year: "2011"
  doi: "http://doi.acm.org/10.1145/1989323.1989389"
  abstract: "In spite of the omnipresence of parallel (multi-core) systems, the predominant strategy to evaluate window-based stream joins is still strictly sequential, mostly just straightforward along the definition of the operation semantics.  In this work we present handshake join, a way of describing and executing window-based stream joins that is highly amenable to parallelized execution. Handshake join naturally leverages available hardware parallelism, which we demonstrate with an implementation on a modern multi-core system and on top of field-programmable gate arrays (FPGAs), an emerging technology that has shown distinctive advantages for high-throughput data processing.  On the practical side, we provide a join implementation that substantially outperforms CellJoin (the fastest published result) and that will directly turn any degree of parallelism into higher throughput or larger supported window sizes. On the semantic side, our work gives a new intuition of window semantics, which we believe could inspire other stream processing algorithms or ongoing standardization efforts for stream query languages. "
  links:
    doi: "http://doi.acm.org/10.1145/1989323.1989389"
    dblp: "http://dblp.uni-trier.de/rec/bibtex/conf/sigmod/TeubnerM11"
  tags:
  - "programming languages"
  - "semantics"
  - "rule-based"
  - "data-flow language"
  - "stream join"
  - "handshake join"
  - "parallelism"
  - "parallel programming"
  - "data-flow programming"
  - "data-flow"
  - "stream processing"
  - "query language"
  - "multi-core"
  researchr: "https://researchr.org/publication/TeubnerM11"
  cites: 30
  citedby: 0
  pages: "625-636"
  booktitle: "Proceedings of the ACM SIGMOD International Conference on Management of Data, SIGMOD 2011, Athens, Greece, June 12-16, 2011"
  editor:
  - name: "Timos K. Sellis"
    link: "https://researchr.org/alias/timos-k.-sellis"
  - name: "Renée J. Miller"
    link: "https://researchr.org/alias/ren%26eacute%3Be-j.-miller"
  - name: "Anastasios Kementsietsidis"
    link: "https://researchr.org/alias/anastasios-kementsietsidis"
  - name: "Yannis Velegrakis"
    link: "https://researchr.org/alias/yannis-velegrakis"
  publisher: "ACM"
  isbn: "978-1-4503-0661-4"
  kind: "inproceedings"
  key: "TeubnerM11"
- title: "FPGA acceleration for the frequent item problem"
  author:
  - name: "Jens Teubner"
    link: "http://people.inf.ethz.ch/jteubner/"
  - name: "René Müller"
    link: "http://www.systems.ethz.ch/people/muellren"
  - name: "Gustavo Alonso"
    link: "http://www.systems.ethz.ch/people/alonso"
  year: "2010"
  doi: "http://dx.doi.org/10.1109/ICDE.2010.5447856"
  abstract: "Field-programmable gate arrays (FPGAs) can provide performance advantages with a lower resource consumption (e.g., energy) than conventional CPUs. In this paper, we show how to employ FPGAs to provide an efficient and high-performance solution for the frequent item problem. We discuss three design alternatives, each one of them exploiting different FPGA features, and we provide an exhaustive evaluation of their performance characteristics.  The first design is a one-to-one mapping of the Space-Saving algorithm (shown to be the best approach in software), built on special features of FPGAs: content-addressable memory and dual-ported BRAM.  The two other implementations exploit the flexibility of digital circuits to implement parallel lookups and pipelining strategies, resulting in significant improvements in performance. On low-cost FPGA hardware, the fastest of our designs can process 80 million items per second—three times as much as the best known result. Moreover, and unlike in software approaches where performance is directly related to the skew factor of the Zipf distribution, the high throughput is independent of the skew of the distribution of the input. In the paper we discuss as well several design trade-offs that are relevant when implementing database functionality on FPGAs. In particular, we look at resource consumption and the levels of data and task parallelism of three different designs. "
  links:
    doi: "http://dx.doi.org/10.1109/ICDE.2010.5447856"
    dblp: "http://dblp.uni-trier.de/rec/bibtex/conf/icde/TeubnerMA10"
  tags:
  - "FPGA"
  - "frequent item"
  - "parallelism"
  - "functional programming"
  - "parallel programming"
  - "data mining"
  - "data-flow programming"
  - "data-flow"
  - "pipelining"
  - "database"
  - "design"
  - "systematic-approach"
  researchr: "https://researchr.org/publication/TeubnerMA10"
  cites: 16
  citedby: 5
  pages: "669-680"
  booktitle: "Proceedings of the 26th International Conference on Data Engineering, ICDE 2010, March 1-6, 2010, Long Beach, California, USA"
  editor:
  - name: "Feifei Li"
    link: "https://researchr.org/alias/feifei-li"
  - name: "Mirella M. Moro"
    link: "https://researchr.org/alias/mirella-m.-moro"
  - name: "Shahram Ghandeharizadeh"
    link: "https://researchr.org/alias/shahram-ghandeharizadeh"
  - name: "Jayant R. Haritsa"
    link: "https://researchr.org/alias/jayant-r.-haritsa"
  - name: "Gerhard Weikum"
    link: "https://researchr.org/alias/gerhard-weikum"
  - name: "Michael J. Carey"
    link: "https://researchr.org/alias/michael-j.-carey"
  - name: "Fabio Casati"
    link: "https://researchr.org/alias/fabio-casati"
  - name: "Edward Y. Chang"
    link: "https://researchr.org/alias/edward-y.-chang"
  - name: "Ioana Manolescu"
    link: "https://researchr.org/alias/ioana-manolescu"
  - name: "Sharad Mehrotra"
    link: "https://researchr.org/alias/sharad-mehrotra"
  - name: "Umeshwar Dayal"
    link: "https://researchr.org/alias/umeshwar-dayal"
  - name: "Vassilis J. Tsotras"
    link: "https://researchr.org/alias/vassilis-j.-tsotras"
  publisher: "IEEE"
  isbn: "978-1-4244-5444-0"
  kind: "inproceedings"
  key: "TeubnerMA10"
- title: "Glacier: a query-to-hardware compiler"
  author:
  - name: "René Müller"
    link: "http://www.systems.ethz.ch/people/muellren"
  - name: "Jens Teubner"
    link: "http://people.inf.ethz.ch/jteubner/"
  - name: "Gustavo Alonso"
    link: "http://www.systems.ethz.ch/people/alonso"
  year: "2010"
  doi: "http://doi.acm.org/10.1145/1807167.1807307"
  abstract: "Field-programmable gate arrays (FPGAs) are a promising technology that can be used in database systems. In this demonstration we show Glacier, a library and a compiler that can be employed to implement streaming queries as hardware circuits on FPGAs. Glacier consists of a library of compositional hardware modules that represent stream processing operators. Given a query execution plan, the compiler instantiates the corresponding components and wires them up to a digital circuit. The goal of this demo is to show the flexibility of the compositional approach.  "
  links:
    doi: "http://doi.acm.org/10.1145/1807167.1807307"
    dblp: "http://dblp.uni-trier.de/rec/bibtex/conf/sigmod/MullerTA10"
  tags:
  - "FPGA"
  - "SQL-to-Hardware"
  - "SQL"
  - "digital library"
  - "composition"
  - "source-to-source"
  - "digital libraries"
  - "compiler"
  - "database"
  - "systematic-approach"
  - "open-source"
  - "stream processing"
  researchr: "https://researchr.org/publication/MullerTA10"
  cites: 8
  citedby: 0
  pages: "1159-1162"
  booktitle: "Proceedings of the ACM SIGMOD International Conference on Management of Data, SIGMOD 2010, Indianapolis, Indiana, USA, June 6-10, 2010"
  editor:
  - name: "Ahmed K. Elmagarmid"
    link: "https://researchr.org/alias/ahmed-k.-elmagarmid"
  - name: "Divyakant Agrawal"
    link: "https://researchr.org/alias/divyakant-agrawal"
  publisher: "ACM"
  isbn: "978-1-4503-0032-2"
  kind: "inproceedings"
  key: "MullerTA10"
- title: "Data Processing on FPGAs"
  author:
  - name: "René Müller"
    link: "http://www.systems.ethz.ch/people/muellren"
  - name: "Jens Teubner"
    link: "http://people.inf.ethz.ch/jteubner/"
  - name: "Gustavo Alonso"
    link: "http://www.systems.ethz.ch/people/alonso"
  year: "2009"
  doi: "http://www.vldb.org/pvldb/2/vldb09-603.pdf"
  abstract: "Computer architectures are quickly changing toward heterogeneous many-core systems. Such a trend opens up interesting opportunities but also raises immense challenges since the efficient use of heterogeneous many-core systems is not a trivial problem. In this paper, we explore how to program data processing operators on top of field-programmable gate arrays (FPGAs). FPGAs are very versatile in terms of how they can be used and can also be added as additional processing units in standard CPU sockets. In the paper, we study how data processing can be accelerated using an FPGA. Our results indicate that efficient usage of FPGAs involves non-trivial aspects such as having the right computation model (an asynchronous sorting network in this case); a careful implementation that balances all the design constraints in an FPGA; and the proper integration strategy to link the FPGA to the rest of the system. Once these issues are properly addressed, our experiments show that FPGAs exhibit performance figures competitive with those of modern general-purpose CPUs while offering significant advantages in terms of power consumption and parallel stream evaluation."
  links:
    doi: "http://www.vldb.org/pvldb/2/vldb09-603.pdf"
  tags:
  - "power consumption"
  - "FPGA"
  - "meta programming"
  - "sorting networks"
  - "case study"
  - "meta-model"
  - "architecture"
  - "parallel programming"
  - "constraints"
  - "data-flow programming"
  - "data-flow"
  - "source-to-source"
  - "Meta-Environment"
  - "design"
  - "process modeling"
  - "open-source"
  - "stream processing"
  researchr: "https://researchr.org/publication/MuellerTA09"
  cites: 29
  citedby: 4
  journal: "PVLDB"
  volume: "2"
  number: "1"
  pages: "910-921"
  kind: "article"
  key: "MuellerTA09"
- title: "Streams on Wires - A Query Compiler for FPGAs"
  author:
  - name: "René Müller"
    link: "http://www.systems.ethz.ch/people/muellren"
  - name: "Jens Teubner"
    link: "http://people.inf.ethz.ch/jteubner/"
  - name: "Gustavo Alonso"
    link: "http://www.systems.ethz.ch/people/alonso"
  year: "2009"
  doi: "http://www.vldb.org/pvldb/2/vldb09-622.pdf"
  abstract: "Taking advantage of many-core, heterogeneous hardware for data processing tasks is a difficult problem. In this paper, we consider the use of FPGAs for data stream processing as co-processors in many-core architectures. We present Glacier, a component library and compositional compiler that transforms continuous queries into logic circuits by composing library components on an operator-level basis. In the paper we consider selection, aggregation, grouping, as well as windowing operators, and discuss their design as modular elements. We also show how significant performance improvements can be achieved by inserting the FPGA into the system's data path (e.g., between the network interface and the host CPU). Our experiments show that queries on the FPGA can process streams at more than one million tuples per second and that they can do this directly from the network, removing much of the overhead of transferring the data to a conventional CPU."
  links:
    doi: "http://www.vldb.org/pvldb/2/vldb09-622.pdf"
  tags:
  - "FPGA"
  - "architecture"
  - "composition"
  - "data-flow"
  - "compiler"
  - "logic"
  - "design"
  - "stream processing"
  researchr: "https://researchr.org/publication/MullerTA09"
  cites: 18
  citedby: 6
  journal: "PVLDB"
  volume: "2"
  number: "1"
  pages: "229-240"
  kind: "article"
  key: "MullerTA09"
- title: "FPGAs: a new point in the database design space"
  author:
  - name: "René Müller"
    link: "http://www.systems.ethz.ch/people/muellren"
  - name: "Jens Teubner"
    link: "http://people.inf.ethz.ch/jteubner/"
  year: "2010"
  doi: "http://doi.acm.org/10.1145/1739041.1739137"
  abstract: "In line with the insight that “one size” of databases will not fit all application needs, the database community is currently exploring various alternatives to commodity, CPU-based system designs. One particular candidate in this trend are field-programmable gate arrays (FPGAs), programmable chips that allow tailor-made hardware designs optimized for specific systems, applications, or even user queries. With a focus on database use, this tutorial introduces into FPGA technology, demonstrates its potential, but also pinpoints some challenges that need to be addressed before FPGA-accelerated database systems can go mainstream. The goal of this tutorial is to develop an intuition of an FPGA development cycle, receive guidelines for a “good” FPGA design, but also learn the limitations that hardware-implemented database processing faces. Our more high-level ambition is to spur a broader interest in database processing on novel hardware technology."
  links:
    doi: "http://doi.acm.org/10.1145/1739041.1739137"
  tags:
  - "FPGA"
  - "optimization"
  - "tutorial"
  - "rule-based"
  - "hardware-acceleration"
  - "database"
  - "program optimization"
  - "design"
  researchr: "https://researchr.org/publication/MullerT10"
  cites: 17
  citedby: 0
  pages: "721-723"
  booktitle: "EDBT 2010, 13th International Conference on Extending Database Technology, Lausanne, Switzerland, March 22-26, 2010, Proceedings"
  editor:
  - name: "Ioana Manolescu"
    link: "https://researchr.org/alias/ioana-manolescu"
  - name: "Stefano Spaccapietra"
    link: "https://researchr.org/alias/stefano-spaccapietra"
  - name: "Jens Teubner"
    link: "http://people.inf.ethz.ch/jteubner/"
  - name: "Masaru Kitsuregawa"
    link: "https://researchr.org/alias/masaru-kitsuregawa"
  - name: "Alain Léger"
    link: "https://researchr.org/alias/alain-l%C3%A3%C2%A9ger"
  - name: "Felix Naumann"
    link: "https://researchr.org/alias/felix-naumann"
  - name: "Anastasia Ailamaki"
    link: "https://researchr.org/alias/anastasia-ailamaki"
  - name: "Fatma Özcan"
    link: "https://researchr.org/alias/fatma-%C3%A3%E2%80%93zcan"
  volume: "426"
  series: "ACM International Conference Proceeding Series"
  publisher: "ACM"
  isbn: "978-1-60558-945-9"
  kind: "inproceedings"
  key: "MullerT10"