Journal: Formal Methods in System Design

Volume 2, Issue 3

231 -- 257Michael C. McFarland. Formal Analysis of Correctness of Behavioral Transformations
259 -- 276Ghislaine Thuau, Bachir Berkane. A Unified Framework for Describing and Verifying Hardware Synchronous Sequential Systems
277 -- 321Kshirasagar Naik, Beh├žet Sarikaya. Test Case Verification by Model Checking

Volume 2, Issue 2

121 -- 147Rance Cleaveland, Bernhard Steffen. A Linear-Time Model-Checking Algorithm for the Alternation-Free Modal Mu-Calculus
149 -- 164Patrice Godefroid, Pierre Wolper. Using Partial Orders for the Efficient Verification of Deadlock Freedom and Safety Properties
165 -- 223Ramayya Kumar, Klaus Schneider, Thomas Kropf. Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment

Volume 2, Issue 1

7 -- 43Hana De-Leon, Orna Grumberg. Modular Abstractions for Verifying Real-Time Distributed Systems
45 -- 72Catia M. Angelo, Diederik Verkest, Luc J. M. Claesen, Hugo De Man. On the Comparison of HOL and Boyer-Moore for Formal Hardware Verification
73 -- 91Stephen D. Brookes. Using Fixed-Point Semantics to Prove Retiming Lemmas
93 -- 112Pranav Ashar, Srinivas Devadas, Kurt Keutzer. Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks