Journal: Formal Methods in System Design

Volume 21, Issue 3

251 -- 280Robert P. Kurshan, Vladimir Levin, Marius Minea, Doron Peled, Hüsnü Yenigün. Combining Software and Hardware Verification Techniques
281 -- 315Peter Buchholz, Peter Kemper. Hierarchical Reachability Graph Generation for Petri Nets
317 -- 338Tamir Heyman, Daniel Geist, Orna Grumberg, Assaf Schuster. A Scalable Parallel Algorithm for Reachability Analysis of Very Large Circuits

Volume 21, Issue 2

111 -- 166Howard Bowman, Maarten Steen, Eerke Boiten, John Derrick. A Formal Framework for Viewpoint Consistency
167 -- 191Janett Mohnke, Paul Molitor, Sharad Malik. Limits of Using Signatures for Permutation Independent Boolean Comparison
193 -- 224Adnan Aziz, Thomas R. Shiple, Vigyan Singhal, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli. Formula-Dependent Equivalence for Compositional CTL Model Checking
225 -- 244Gerd Behrmann, Kim Guldstrand Larsen, Henrik Reif Andersen, Henrik Hulgaard, Jørn Lind-Nielsen. Verification of Hierarchical State/Event Systems using Reusability and Compositionality

Volume 21, Issue 1

5 -- 38Radu Grosu, Thomas Stauner. Modular and Visual Specification of Hybrid Systems: An Introduction to HyCharts
39 -- 78Kathi Fisler, Moshe Y. Vardi. Bisimulation Minimization and Symbolic Model Checking
79 -- 94Richard Raimi, James Lear. Silicon Debug of a PowerPC[tm] Microprocessor Using Model Checking
95 -- 101Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Jacob A. Abraham, Donald S. Fussell, Masahiro Fujita. Efficient Combinational Verification Using Overlapping Local BDDs and a Hash Table