Journal: Formal Methods in System Design

Volume 5, Issue 3

183 -- 205Shuvra S. Bhattacharyya, Edward A. Lee. Looped Schedules for Dataflow Descriptions of Multirate Signal Processing Algorithms
207 -- 225David M. Goldschlag. Mechanically Verifying Safety and Liveness Properties of Delay Insensitive Circuits
227 -- 244Robert P. Kurshan, Michael Merritt, Ariel Orda, Sonia R. Sachs. A Structural Linearization Principle for Processes
245 -- 273Radhakrishna Nagalla, Graham R. Hellestrand. Signal Transition Graph Constraints for Synthesis of Hazard-Free Asynchronous Circuits with Unbounded-Gate Delays

Volume 5, Issue 1/2

7 -- 33Holger Busch. Rule-Based Induction
35 -- 59John Harrison. Constructing the Real Numbers in HOL
61 -- 94Catia M. Angelo, Luc J. M. Claesen, Hugo De Man. Modeling Multi-rate DSP Specification Semantics for Formal Transformational Design in HOL
95 -- 117Mark Aagaard, Miriam Leeser. A Methodology for Efficient Hardware Verification
119 -- 144Saraswati Kalvala. Annotations in Formal Specifications and Proofs
145 -- 176Klaus Schneider, Ramayya Kumar, Thomas Kropf. Accelerating Tableaux Proofs Using Compact Representations