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    Journal: IET Circuits, Devices & Systems

    Volume 13, Issue 8

    1107 -- 1116Aadil Tahir Shora, Farooq Ahmad Khanday. Analytical modelling and performance analysis of gate- and channel-engineered trapezoidal trigate MOSFET
    1117 -- 1124Jayesh Popat, Usha Mehta. Statistical security analysis of AES with X-tolerant response compactor against all types of test infrastructure attacks with/without novel unified countermeasure
    1125 -- 1133Arash Ahmadi. High-power multi-octave laterally diffused metal-oxide-semiconductor power amplifier with resistive harmonic termination
    1134 -- 1141A. Anita Angeline, V. S. Kanchana Bhaaskaran. Design impacts of delay invariant high-speed clock delayed dual keeper domino circuit
    1142 -- 1151Ridvan Umaz, Lei Wang 0003. Integrated power converter design for bioturbation resilience in multi-anode microbial fuel cells
    1152 -- 1159Ghasem Pasandi, Kolsoom Mehrabi, Behzad Ebrahimi, Sied Mehdi Fakhraei, Ali Afzali-Kusha, Massoud Pedram. Low-power data encoding/decoding for energy-efficient static random access memory design
    1160 -- 1168Aleksey Dyskin, Ingmar Kallfass. Feasibility study of the feed-forward carrier recovery technique for E-band integrated receivers
    1169 -- 1180Debdut Biswas, Tarun Kanti Bhattacharyya. Spur reduction architecture for multiphase fractional PLLs
    1181 -- 1186Ching Ying Huang, Pin-Hsuan Wu, Kun-Long Wu, Robert Hu, Chi-Yang Chang. IL analysis for 8-way power combining network in 77-110 GHz 40 nm-complementary metal-oxide-semiconductor PA design
    1187 -- 1195Madhusmita Panda, Santosh Kumar Patnaik, Ashis Kumar Mal, Sumalya Ghosh. Fast and optimised design of a differential VCO using symbolic technique and multi objective algorithms
    1196 -- 1202Shikhar Gupta, Ashutosh Nandi. Effect of air spacer in underlap GAA nanowire: an analogue/RF perspective
    1203 -- 1208Dongfang Pan, Zongming Daun, Liguo Sun, Ping Gui. Compact and high-linearity 77 GHz CMOS receiver front-end for automotive radar
    1209 -- 1220Prasun Datta, Shyamapada Mukherjee. Architecture-aware routability-driven placer for large-scale mixed-size designs
    1221 -- 1231Fereshteh Jafarzadehpour, Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi, Leonel Sousa. New energy-efficient hybrid wide-operand adder architecture
    1232 -- 1240Mohammed Shoukry, Fayez Gebali, Panajotis Agathoklis. Decimator systolic arrays design space exploration for multirate signal processing applications
    1241 -- 1248Zhekang Dong, Chun Sing Lai, Yufei He, Donglian Qi, Shukai Duan. Hybrid dual-complementary metal-oxide-semiconductor/memristor synapse-based neural network with its applications in image super-resolution
    1249 -- 1254Umer F. Ahmed, Muhammad Mansoor Ahmed, Qamar D. Memon. Non-linear compact model for FinFETs output characteristics
    1255 -- 1261Shubham Negi, Poornima Mittal, Brijesh Kumar. Analytical modelling and parameters extraction of multilayered OLED
    1262 -- 1266Ching Ying Huang, Robert Hu, Dow-Chi Niu, Chi-Yang Chang. Analysis and design of wideband active power splitter with interleaf transmission line topology
    1267 -- 1276Mohan Appikonda, Dhanalakshmi Kaliaperumal. Modelling and control of dual input boost converter with voltage multiplier cell
    1277 -- 1283Chang-Kyo Lee, Seung-Tak Ryu. Noise analysis of replica driving technique and its verification to 12-bit 200 MS/s pipelined ADC
    1284 -- 1291Weibin Zhu, Shengjin Ye, Yao Huang, Zi Xue. Design of a precise subdivision system for gratings using a modified CORDIC algorithm
    1292 -- 1298Sumedha Dasgupta, Chandrima Mondal, Abhijit Biswas. Role of grooving angle of 14-nm-InAs channel quantum well MOSFETs in improving analogue/RF and linearity performance
    1299 -- 1304Bassem Jmai, Hugo Dinis, Pedro Anacleto, Adnen Rajhi, Paulo M. Mendes, Ali Gharsallah. Modelling, design and fabrication of a novel reconfigurable ultra-wide-band impedance matching based on RF MEMS technology
    1305 -- 1310Avtar Singh, Saurabh Chaudhury, Chandan Kumar Pandey, Savitesh Madhulika Sharma, Chandan Kumar Sarkar. k silicon nanotube tunnel FET device

    Volume 13, Issue 7

    929 -- 933Brent Maundy, Ahmed S. Elwakil. Third-order tunable-phase asymmetric cross-coupled oscillator
    934 -- 941Arshad Hussain, Goang Seong Choi. Single low-gain amplifier compensated hybrid delta-sigma modulator
    942 -- 949Sahar Fatemi, Maryam Zare, Amir Farzad Khavari, Mohammad Maymandi-Nejad. Efficient implementation of digit-serial Montgomery modular multiplier architecture
    950 -- 957Dmitry Oshmarin, Farshad Yazdi, Mohamed A. K. Othman, Jeff T. Sloan, Mohammad Radfar, Michael M. Green, Filippo Capolino. New oscillator concept based on band edge degeneracy in lumped double-ladder circuits
    958 -- 969Jai Gopal Pandey, Tarun Goel, Abhijit Karmakar. Hardware architectures for PRESENT block cipher and their FPGA implementations
    970 -- 978Brijesh Kumar Kushwaha, Gautam Rituraj, Praveen Kumar, Pavol Bauer. Mathematical model for the analysis of series-parallel compensated wireless power transfer system for different misalignments
    979 -- 987Seyed Milad Ebrahimipour, Behnam Ghavami, Mohsen Raji. Adjacency criticality: a simple yet effective metric for statistical timing yield optimisation of digital integrated circuits
    988 -- 997Rekha S., Vasantha Moodabettu Harishchandra, Tonse Laxminidhi. Ultra-low voltage, power efficient continuous-time filters in 180 nm CMOS technology
    998 -- 1006Yue Li, Fei Yuan. 3-LMS data-transition decision feedback equaliser
    1007 -- 1017Pramod Patali, Shahana Thottathikkulam Kassim. High throughput FIR filter architectures using retiming and modified CSLA based adders
    1018 -- 1026Junqi Huang, T. Nandha Kumar, Haider Abbas, Fabrizio Lombardi. Approximate computing using frequency upscaling
    1027 -- 1031Seema Narwal, Sudakar Singh Chauhan. Performance investigation of electrode work-function engineered hetero-dielectric buried oxide vertical TFET
    1032 -- 1038Mohammed Shoukry, Fayez Gebali, Panajotis Agathoklis. Systolic array design space exploration of interpolators for multi-rate systems
    1039 -- 1048Dinesh Kumar Dash, Priyanka Saha, Subir Kumar Sarkar. Analytical modelling of dielectric engineered strained dual-material double-gate-tunnelling field effect transistor
    1049 -- 1055Xianlei Xu, Tian Xia, Zheng Ma, Dryver Huston. Integrated synchronous data acquisition subsystem for high-speed GPR system
    1056 -- 1062Amir Fathi, Morteza Mousazadeh, Abdollah Khoei. High-speed, low power, and dead zone improved phase frequency detector
    1063 -- 1070Ramaian Subramanian Kamalakannan, Kuppusamy Venkatachalam. Low power radiation aware transistor level design using tri-state inverter embedded non-clock gating technique
    1071 -- 1077Zhao Zhang 0004, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu. 0.1-5 GHz wideband ΔΣ fractional-N frequency synthesiser for software-defined radio application
    1078 -- 1085Srinivasan Raghavendran, Mangalanathan Umapathy, Uma Gandhi, Lakshmi Ravikularaman Karlmarx. Bridgeless active rectifier for piezoelectric energy harvesting
    1086 -- 1092Jayaram Reddy Machha Krishna Reddy, Tonse Laxminidhi. 1.8 V, 25.9 nW, 91.86 dB dynamic range second-order lowpass filter tunable in the range 4-100 Hz
    1093 -- 1101Girija Sravani Kondaveeti, Koushik Guha, Srinivasa Rao Karumuri, Ameen Elsinawi. Design of a novel structure capacitive RF MEMS switch to improve performance parameters
    1102 -- 1106Ali Kazemi Nasaban Shotorban, Kian Jafari, Kambiz Abedi. Optical MEMS accelerometer sensor relying on a micro-ring resonator and an elliptical disk

    Volume 13, Issue 6

    731 -- 740Bahram Rashidi. Efficient and high-throughput application-specific integrated circuit implementations of HIGHT and PRESENT block ciphers
    741 -- 747Yu Wang, Donghoon Yeo, Hyunchul Shin. Effective datapath logic extraction techniques using connection vectors
    748 -- 755Basim Ahmad Alabsi, Mohammed Anbar, Selvakumar Manickam, Omar E. Elejla. DDoS attack aware environment with secure clustering and routing based on RPL protocol operation
    756 -- 762Muhammad Bilal 0001. Resource-efficient FPGA implementation of perspective transformation for bird's eye view generation using high-level synthesis framework
    763 -- 770Prabhat Kumar Dubey, Brajesh Kumar Kaushik, Eddy Simoen. Analytical modelling and device design optimisation of epitaxial layer-based III-V tunnel FET
    771 -- 782Karim Meddah, Malika Kedir-Talha, Mohammed Bahoura, Hadjer Zairi. FPGA-based system for heart rate monitoring
    783 -- 786Sung Hwan Lee, Ickjin Kwon. Fast transient low-dropout regulator with undershoot and settling time reduction technique
    787 -- 792Bandi Venkata Chandan, Kaushal Nigam, Dheeraj Sharma. Approach on electrically doped TFET for suppression of ambipolar and improving RF performance
    793 -- 805Ravichandran Chinnappan, Premalatha Logamani, Rengaraj Ramasubbu. Fixed frequency integral sliding-mode current-controlled MPPT boost converter for two-stage PV generation system
    806 -- 815Mojtaba Noorallahzadeh, Mohammad Mosleh. Efficient designs of reversible latches with low quantum cost
    816 -- 821Vasileios Leon, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi. Energy-efficient VLSI implementation of multipliers with double LSB operands
    822 -- 829Hüseyin Yesilyurt, Haci Bodur. New active snubber cell for high power isolated PWM DC-DC converters
    830 -- 835Yongtao Qiu, Jie Zhou, Youjiang Liu, Guifu Zhang, Yinong Liu. Novel adaptive blind calibration technique of time-skew mismatches for any channel time-interleaved analogue-to-digital converters
    836 -- 842Aditya Kumar Singh Pundir. Novel modified memory built in self-repair (MMBISR) for SRAM using hybrid redundancy-analysis technique
    843 -- 847Okan Zafer Batur, Naci Pekcokguler, Günhan Dündar, Mutlu Koca. Synchronisation free non-coherent on-off keying demodulation techniques
    848 -- 856Yen-Jen Chang, Yu-Cheng Cheng, Yi-Fong Lin, Shao-Chi Liao, Chun-Hsiang Lai, Tung-Chi Wu. Imprecise 4-2 compressor design used in image processing applications
    857 -- 862Chi-Chang Lu, Ding-Ke Huang. 1.2 V 10-bits 40 MS/s CMOS SAR ADC for low-power applications
    863 -- 872Sa'ed Abed, Bassam Jamil Mohd, Mohammad H. Al Shayeji. Implementation of speech feature extraction for low-resource devices
    873 -- 878Maryam Nobakht, Rahebeh Niaraki Asli. A new 7T SRAM cell in sub-threshold region with a high performance and small area with bit interleaving capability
    879 -- 887Zhen-Zhong Qi, Yao-Lin Jiang, Zhi-Hua Xiao. Structure-preserved MOR method for coupled systems via orthogonal polynomials and Arnoldi algorithm
    888 -- 895Disha Bhattacharjee, Bijoy Goswami, Dinesh Kumar Dash, Ayan Bhattacharya, Subir Kumar Sarkar. Analytical modelling and simulation of drain doping engineered splitted drain structured TFET and its improved performance in subduing ambipolar effect
    896 -- 902Intissar Moussa, Adel Bouallegue, Adel Khedher. New wind turbine emulator based on DC machine: hardware implementation using FPGA board for an open-loop operation
    903 -- 907Devarshi Mrinal Das, Amogh Vidwans, Abhishek Srivastava, Meraj Ahmad, Saujal Vaishnav, Sourya Dewan, Maryam Shojaei Baghini. Design and development of an Internet-of-Things enabled wearable ExG measuring system with a novel signal processing algorithm for electrocardiogram
    908 -- 919A. Andrew Roobert, D. Gracia Nirmala Rani, S. Rajaram. Design and optimisation of feedforward noise cancelling complementary metal oxide semiconductor LNA for 2.4 GHz WLAN applications
    920 -- 927Arnaldo del Risco Sánchez, Robson L. Moreno, Luis Henrique de Carvalho Ferreira, Paulo César Crepaldi. Biasing technique to improve total harmonic distortion in an ultra-low-power operational transconductance amplifier

    Volume 13, Issue 5

    571 -- 575Ria Bose, Jitendra Nath Roy. 2D Surface potential and mobility modelling of doped/undoped symmetric double gate MOSFET
    576 -- 583Malek Safieh, Jürgen Freudenberger. Efficient VLSI architecture for the parallel dictionary LZW data compression algorithm
    584 -- 595Soumitra Pal 0002, Vivek Gupta 0006, Wing-Hung Ki, Aminul Islam. Transmission gate-based 9T SRAM cell for variation resilient low power and reliable internet of things applications
    596 -- 606Saeide Sheikhpour, Ali Mahani, Nasour Bagheri. Practical fault resilient hardware implementations of AES
    607 -- 613Sen Wang, Ying Yang, Wenbin Song, Huanqing Cui, Cheng Li, Li Cai. All-spin logic XOR gate implementation based on input interface
    614 -- 621Seyed Mahmoud Anisheh, Hamed Abbasizadeh, Hossein Shamsi, Chitra Dadkhah, Kang-Yoon Lee. 84 dB DC-gain two-stage class-AB OTA
    622 -- 629Zhonghua Ma, Yanfeng Jiang. Carrier extraction cancellation circuit in RFID reader for improving the Tx-to-Rx isolation
    630 -- 636Minoo Labibi, Mahdiyeh Mehran. Novel liquid-based linear capacitive inclination micro-sensor with totally 360° dynamic range
    637 -- 646Giri Prasad Raman, Venkatesan Perumal. Neuro-fuzzy based two-stage spectrum allocation scheme to ensure spectrum efficiency in CRN-CSS assisted by spectrum agent
    647 -- 655Ahmad Karimi, Abdalhossein Rezai. n to 1 multiplexer using new IMPLY logic approach
    656 -- 660Chenguang Guo, Jiancheng Xu, Wenyao Xu. Highly efficient design of SDRAM-based CTM for real-time SAR imaging system
    661 -- 666JinBao Zhang, Ning Wu, Jianhua Li, Fang Zhou. A novel differential fault analysis using two-byte fault model on AES Key schedule
    667 -- 678Kanchan Baran Maj, Rajib Kar, Durbadal Mandal, Sakti Prasad Ghoshal. Optimal designs of nulling resistor compensation and a robust bias-based op-amp circuit using an evolutionary approach
    679 -- 688Sumalya Ghosh, Bishnu Prasad De, Rajib Kar, Ashis Kumar Mal. Symbiotic organisms search algorithm for optimal design of CMOS two-stage op-amp with nulling resistor and robust bias circuit
    689 -- 695Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi. Tunnel FET ambipolarity-based energy efficient and robust true random number generator against reverse engineering attacks
    696 -- 703Daniel Valencia, Amirhossein Alimohammad. Compact and high-throughput parameterisable architectures for memory-based FFT algorithms
    704 -- 709Kechuan Wu, Xiaoping Wang. Enhanced memristor-based MNNs performance on noisy dataset resulting from memristive stochasticity
    710 -- 716Yang Wei Lim, Noor Ain Kamsani, Roslina Mohd Sidek, Shaiful Jahari Hashim, Fakhrul Zaman Rokhani. Six-track multi-finger standard cell library design for near-threshold voltage operation in 130 nm complementary metal oxide semiconductor technology
    717 -- 722Sang Won Kim, Min-Joon Kim, Jae Seok Kim. High-performance DSP platform for digital hearing aid SoC with flexible noise estimation
    723 -- 729Ashutosh Kumar Singh, Hari Mohan Gaur, Umesh Ghanekar. Fault detection in multiple controlled Fredkin circuits

    Volume 13, Issue 4

    421 -- 427Ramin Razmdideh, Mohsen Saneei. All-digital delay line-based time difference amplifier in 65 nm CMOS technology
    428 -- 434Jay Pathak, Anand D. Darji. 0.47As FinFET with gate-to-source/drain underlap for sub-14 nm technology node to impede short channel effect
    435 -- 441Sangeeta Singh, Ruchir Sinha, Pravin Neminath Kondekar. Impact of PZT gate-stack induced negative capacitance on analogue/RF figures-of-merits of electrostatically-doped ferroelectric Schottky-barrier tunnel FET
    443 -- 455Muhammad Awais, Anas Razzaq, Ashfaq Ahmed, Guido Masera. LDPC check node implementation using reversible logic
    456 -- 464Sudipta Bardhan, Manodipan Sahoo, Hafizur Rahaman. Boltzmann transport equation-based semi-classical drain current model for bilayer GFET including scattering effects
    465 -- 470Kishore Sanapala, Ramachandran Sakthivel. Ultra-low-voltage GDI-based hybrid full adder design for area and energy-efficient computing systems
    471 -- 478Hadhiq Khan, Mohammad Abid Bazaz, Shahkar Ahmad Nahvi. Singular perturbation-based model reduction of power electronic circuits
    479 -- 486Predrag B. Petrovic. Tunable flux-controlled floating memristor emulator circuits
    487 -- 493Manoj Kumar Tiwari, Neeta Pandey, Sajal K. Paul, Saiyid Mohammad Irshad Rizvi. Programmable CCCII: reliability analysis and design methodology
    494 -- 498Ifana Mahbub, Samira Shamsir, Salvatore A. Pullano, Syed K. Islam. Low-power low-data-rate IR-UWB transmitter for paediatric apnoea monitoring system
    499 -- 503Ifana Mahbub, Samira Shamsir, Salvatore A. Pullano, Antonino S. Fiorillo, Syed K. Islam. Design of a charge amplifier for a low-power respiration-monitoring system
    504 -- 509Supriya Karmakar. Generation of four states in MOSFET for future multivalued logic circuit design
    510 -- 518Debapriya Roy, Abhijit Biswas. Effects of asymmetric underlap spacers on nanoscale junctionless transistors and design of optimised CMOS amplifiers
    519 -- 525Arun Kumar, Shiv Bhushan, Pramod Kumar Tiwari. Drain current modelling of double gate-all-around (DGAA) MOSFETs
    526 -- 533Piratla Uma Sathyakam, Partha Sharathi Mallick, Anmol Ajay Saxena. High-speed sub-threshold operation of carbon nanotube interconnects
    534 -- 543Ismail Gassoumi, Lamjed Touil, Bouraoui Ouni. Design of efficient quantum Dot cellular automata (QCA) multiply accumulate (MAC) unit with power dissipation analysis
    544 -- 547Iraj Sheikhian, Foad Sharafi. Improved nanoscale field effect diode
    548 -- 557Soumitra Pal 0002, Vivek Gupta 0006, Wing-Hung Ki, Aminul Islam. Design and development of memristor-based RRAM
    558 -- 564Soumyajit Seth. Observation of robust chaos in 3D electronic system
    565 -- 570Chenguang Guo, Jiancheng Xu, Hui Zhang. Design of Doppler parameters estimation circuit

    Volume 13, Issue 3

    267 -- 272Ersin Alaybeyoglu. Implementation of capacitor multiplier with cell-based variable transconductance amplifier
    273 -- 278Muhammad Fahim Ul Haque, Muhammad Touqir Pasha, Ted Johansson. Power-efficient aliasing-free PWM transmitter
    279 -- 291Chun-Ming Chang, Shu-Hui Tu, M. N. Srikanta Swamy, Ahmed M. Soliman. nth-order filter structures using DDCCs, FDCCIIs, and grounded capacitors and resistors
    292 -- 302Rajeev Kumar Ranjan 0002, Surendra Sagar, Subrato Roushan, Bharti Kumari, Nishtha Rani, Fabian Khateb. High-frequency floating memristor emulator and its experimental results
    303 -- 308Ziren Wang, Jinchun Gao, George T. Flowers, Lingyu Bi, Gang Xie, Yilin Zhou. Investigation of the improvement of signal integrity in electrical circuits with degraded contacts using differential transmission
    309 -- 313Arash Rezaei, Bahram Azizollah Ganji, Morteza Gholipour. OFF ratio
    314 -- 320Montree Kumngern, Fabian Khateb, Tomasz Kulej. 0.5 V bulk-driven CMOS fully differential current feedback operational amplifier
    321 -- 326Weize Yu. Hardware Trojan attacks on voltage scaling-based side-channel attack countermeasure
    327 -- 336Leenendra Chowdary Gunnam, Guo-Ming Sung, Lei-Wen Weng, Te-Chia Fan. 2-1 Switched-current multi-stage noise-shaping delta-sigma modulator with a digital noise-cancellation circuit
    337 -- 343Swarnil Roy, Sagar Mukherjee, Arka Dutta, Chandan Kumar Sarkar, Chayanika Bose. Circuit performance analysis of graded doping of channel of DGMOS with high-k gate stack for analogue and digital application
    344 -- 351Hsiung-Cheng Lin, Kai-Chun Hsiao. Integration of DC circuit breaker and fault current limiter based on zero-voltage resonant switching approach
    352 -- 360Vivekanandan Subburaj, Ainur Zhaikhan, Debashisha Jena, Parthiban Perumal, Yerzhan Mustafa, Alex Ruderman. Investigation of a family of dual-output coupled/decoupled switched capacitor converter for low-power applications
    361 -- 367Mohsen Hayati, Abbas Rezaei, Leila Noori. Design of a high-performance lowpass-bandpass diplexer using a novel microstrip structure for GSM and WiMAX applications
    368 -- 373Lu Liu, Daiguo Xu, Shiliu Xu. Rapid calibration of bits weights error for high-resolution successive approximation register ADC
    374 -- 384Mariammal Thirumeni, Deepa Thangavelusamy. Design and analysis of hybrid PSO-GSA tuned PI and SMC controller for DC-DC Cuk converter
    385 -- 390Aouissi Samiha, Benouaret Mohamed, Harize Saliha. DFT processor implementation scheme based on Rader algorithm
    391 -- 398Priti Shahane, Narayan Pisharoty. X-Y routing for mesh topology based NoC router on field programmable gate array
    399 -- 405Akram Bati, Patrick C. K. Luk, Samer Aldhaher, Chan H. See, Raed A. Abd-Alhameed, Peter S. Excell. 2 converter for low power wireless charging links
    406 -- 413Ching Ying Huang, Kun-Long Wu, Robert Hu, Chi-Yang Chang. Analysis of wide-IF-band 65 nm-CMOS mixer for 77-110 GHz radio-astronomical receiver design
    414 -- 419Xiaoyan Wang, Xiaobo Xu, Huifeng Wang. Analytical model for uniaxial strained Si inversion layer electron effective mobility

    Volume 13, Issue 2

    111 -- 116Ao Li, Vahid Meghdadi, Jean-Pierre Cances, Christelle Aupetit-Berthelemot. High-throughput 2 bit low-density parity-check forward error correction for C-RAN optical fronthaul based on a hard-decision algorithm
    117 -- 124Chuang Wang 0004, Lvchen Zhou, Zunchao Li. Survey of switch fault diagnosis for modular multilevel converter
    125 -- 130Fayu Wan, Lei Wang, Qizheng Ji, Blaise Ravelo. Canonical transfer function of band-pass NGD circuit
    131 -- 138Nevena R. Brnovic, Igor Djurovic, Veselin N. Ivanovic, Marko Simeunovic. Hardware implementation of the quasi-maximum likelihood estimator core for polynomial phase signals
    139 -- 144Kalpana Agrawal, Ritu Srivastava, S. S. Rajput. D)
    145 -- 152Bulent Nafi Ornek, Timur Duzenli. On boundary analysis for derivative of driving point impedance functions and its circuit applications
    153 -- 162Piotr J. Osuch, Tinus Stander. High-Q second-order all-pass delay network in CMOS
    163 -- 173Sandeep Garg, Tarun K. Gupta. Low leakage domino logic circuit for wide fan-in gates using CNTFET
    174 -- 184Chun-Ming Chang, Shu-Hui Tu, M. N. S. Swamy, Ahmed M. Soliman. nth-order elliptic high-pass filters employing OTRAs
    185 -- 192Seok-Kyoon Kim. Performance-recovery proportional-type output-voltage tracking algorithm of three-phase inverter for uninterruptible power supply applications
    193 -- 202Sepehr Tabrizchi, MohammadReza Taheri, Keivan Navi, Nader Bagherzadeh. Novel CNFET ternary circuit techniques for high-performance and energy-efficient design
    203 -- 210Jie Zhang 0039, Hong Zhang, Bo Yang, Ruizhi Zhang. Joint background calibration of gain and timing mismatch errors with low hardware cost for time-interleaved ADCs
    211 -- 218Dalvir K. Saini, Agasthya Ayachit, Marian K. Kazimierczuk. Design and characterisation of single-layer solenoid air-core inductors
    219 -- 225Jupinder Kaur, Prince Prabhakar, Anil Singh, Alpana Agarwal. Fast digital foreground gain error calibration for pipelined ADC
    226 -- 232Yan-Ming Li, Jian Sun, Xiao-Li Xi, Zhong Hui Chen, Xiao-Xiao Wang, Xin-An Deng, Li Qin, Zan Zhang, Chang-Bao Wen. Novel broken line detection circuit for multi-cells Li-ion battery protection ICs
    233 -- 238Anwar Jarndal, Amer M. Bassal. Compact GaN class-AB Armstrong oscillator for resonant wireless power transfer
    239 -- 244M. K. Jayaram Reddy, Tonse Laxminidhi. C filter for biomedical applications
    245 -- 249Hongyi Wang, Youyou Fan, Chen Chen, Tao Tao, Zeyu Qiao. Novel estimation solution on lithium-ion battery state of charge with current-free detection algorithm
    251 -- 258Tanmai Kulshreshtha, Anindya Sundar Dhar. Improved VLSI architecture for triangular windowed sliding DFT based on CORDIC algorithm
    259 -- 265Paria Jamshidi, Mohammad Maymandi-Nejad. Design challenges for a new mostly digital VCO-based delta-sigma modulator

    Volume 13, Issue 1

    1 -- 6Joy Iong-Zong Chen. Integrated routing scheme and inverter switch to develop a mobile controlled energy saving system
    7 -- 11Mohammad Azim Karami, Misagh Ansarian. Optically triggered global shutter image sensor using single-photon avalanche diodes
    12 -- 20Md Sakib Hasan, Syed K. Islam. 4FET) for implementation in circuit simulator using multivariate regression polynomial
    21 -- 30Alejandro Medina-Santiago, Mario Alfredo Reyes-Barranca, Ignacio Algredo-Badillo, Alfonso Martinez Cruz, Kelsey A. Ramírez-Gutiérrez, Eleazar Adrián Cortés-Barrón. Reconfigurable arithmetic logic unit designed with threshold logic gates
    31 -- 38Malek Safieh, Jürgen Freudenberger. Pipelined decoder for the limited context order Burrows-Wheeler transformation
    39 -- 44Bahram Azizollah Ganji, Sanaz Kheiry, Samaneh Soleimani. Design of small size and high sensitive less-invasive wireless blood pressure sensor using MEMS technology
    45 -- 50Ramarao Garike, Ganesh C. Patil. 2 dual-k spacer bulk planar junctionless transistor for mixed signal integrated circuits
    51 -- 60Hao Chen, Xuefeng Hu, Yuanyuan Huang, Meng Zhang, Benbao Gao. Improved DC-DC converter topology for high step-up applications
    61 -- 72Guishu Liang, Zheng Qi. n-port with three element orders
    73 -- 78Anping He, Guangbo Feng, Jilin Zhang, Jinzhao Wu. An asynchronous mesh NoC based booth multiplication
    79 -- 90Debarati Dey, Pradipta Roy, Debashis De. Electronic enhancement effect of doped ferromagnetic material in biomolecular heterojunction switch
    91 -- 97Ashima Gupta, Anil Singh, Alpana Agarwal. Highly-digital voltage scalable 4-bit flash ADC
    98 -- 102Supriya Karmakar, John A. Chandy, Faquir C. Jain. Eight-bit ADC using non-volatile flash memory
    103 -- 109Harjap Saini, Anu Gupta. Constant power consumption design of novel differential logic gate for immunity against differential power analysis
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