| 433 | -- | 441 | Dong-Ok Han, Jeong-Hoon Kim, Kwang-Du Lee, Sang-Gyu Park, S.-M. Oh, Eung-Ju Kim. Fully integrated dual-band transceiver for IEEE 802.11a/b/g/j/n wireless local area network applications with hybrid up/down conversion architecture |
| 442 | -- | 450 | Kaushik Bhattacharyya, Pradip Mandal. Technique for the reduction of output voltage ripple of switched capacitor-based DC??DC converters |
| 451 | -- | 461 | Rong-Jong Wai, You-Wei Lin, H.-C. Yang. Experimental verification of total sliding-mode control for Chua's chaotic circuit |
| 462 | -- | 470 | Syed Askari, Mehrdad Nourani, Ali Namazi. Fault-tolerant A/D converter using analogue voting |
| 471 | -- | 476 | Ming Ming Wong, M. L. Dennis Wong, Asoke K. Nandi, I. Hijazin. 2) advanced encryption standard (AES) S-box with algebraic normal form representation in the subfield inversion |
| 477 | -- | 483 | Daniel Schinke, Shivam Priyadarshi, W. Shepherd Pitts, Neil Di Spigna, Paul D. Franzon. SPICE-compatible physical model of nanocrystal floating gate devices for circuit simulation |
| 484 | -- | 493 | Lingli Xia, Hu Chen, Yumei Huang, Zhiliang Hong, Patrick Yin Chiang. 100-phase, dual-loop delay-locked loop for impulse radio ultra-wideband coherent receiver synchronisation |
| 494 | -- | 504 | P. Sumathi, P. A. Janakiraman. Phase locking scheme based on look-up-table-assisted sliding discrete fourier transform for low-frequency power and acoustic signals |
| 505 | -- | 517 | Ethiopia Nigussie, Sampo Tuuna, Juha Plosila, Pasi Liljeberg, Jouni Isoaho, Hannu Tenhunen. Boosting performance of self-timed delay-insensitive bit parallel on-chip interconnects |
| 518 | -- | 526 | Terdpun Choogorn, Jirayuth Mahattanakul. Relationship between common-mode rejection and differential-mode distortion in fully differential Gm-C filters |
| 527 | -- | 535 | Dattaguru V. Kamat, Pemmaraju V. Ananda Mohan, K. Gopalakrishna Prabhu. Active-RC filters using two-stage OTAs with and without feed-forward compensation |