| 20 | -- | 0 | Yiyu Shi, Takashi Sato. Introduction to: Special Issue on Cross-Layer System Design |
| 21 | -- | 0 | Vivek K. De, Andrew B. Kahng, Tanay Karnik, Bao Liu, Milad Maleki, Lu Wang. Application-Specific Cross-Layer Optimization Based on Predictive Variable-Latency VLSI Design |
| 22 | -- | 0 | Milan Patnaik, Chidhambaranathan Rajamanikkam, Chirag Garg, Arnab Roy, V. R. Devanathan, Shankar Balachandran, V. Kamakoti. ProWATCh: A Proactive Cross-Layer Workload-Aware Temperature Management Framework for Low-Power Chip Multi-Processors |
| 23 | -- | 0 | Chenyuan Zhao, Bryant T. Wysocki, Yifang Liu, Clare Thiem, Nathan R. McDonald, Yang Yi. Spike-Time-Dependent Encoding for Neuromorphic Processors |
| 24 | -- | 0 | Martin Barke, Ulf Schlichtmann. A Cross-Layer Approach to Measure the Robustness of Integrated Circuits |
| 25 | -- | 0 | Cheng Zhuo, Houle Gan, Wei-Kai Shih, Alaeddin A. Aydiner. A Cross-Layer Approach for Early-Stage Power Grid Design and Optimization |
| 26 | -- | 0 | Jinho Lee, Kyungsu Kang, Kiyoung Choi. REDELF: An Energy-Efficient Deadlock-Free Routing for 3D NoCs with Partial Vertical Connections |
| 27 | -- | 0 | Davide Zoni, William Fornaciari. Modeling DVFS and Power-Gating Actuators for Cycle-Accurate NoC-Based Simulators |
| 28 | -- | 0 | Xianmin Chen, Niraj K. Jha. gem5-PVT: A Framework for FinFET System Simulation under PVT Variations |
| 29 | -- | 0 | Tayebeh Bahreini, Naser MohammadZadeh. An MINLP Model for Scheduling and Placement of Quantum Circuits with a Heuristic Solution Approach |
| 30 | -- | 0 | Mostafizur Rahman, Santosh Khasanvis, Csaba Andras Moritz. Nanowire Volatile RAM as an Alternative to SRAM |