Journal: JETC

Volume 13, Issue 4

0 -- 0Eldhose Peter, Anuj Arora, Janibul Bashir, Akriti Bagaria, Smruti R. Sarangi. Optical Overlay NUCA: A High-Speed Substrate for Shared L2 Caches
0 -- 0Rekha Govindaraj, Swaroop Ghosh. Design and Analysis of STTRAM-Based Ternary Content Addressable Memory Cell
0 -- 0Karthik Yogendra, Chamika M. Liyanagedera, Deliang Fan, Yong Shim, Kaushik Roy 0001. Coupled Spin-Torque Nano-Oscillator-Based Computation: A Simulation Study
0 -- 0Sai Vineel Reddy Chittamuru, Srinivas Desai, Sudeep Pasricha. SWIFTNoC: A Reconfigurable Silicon-Photonic Network with Multicast-Enabled Channel Sharing for Multicore Architectures
0 -- 0Mahboobeh Houshmand, Mehdi Sedighi, Morteza Saheb Zamani, Kourosh Marjoei. Quantum Circuit Synthesis Targeting to Improve One-Way Quantum Computation Pattern Cost Metrics
0 -- 0M. Hassan Najafi, Peng Li, David J. Lilja, Weikang Qian, Kia Bazargan, Marc D. Riedel. A Reconfigurable Architecture with Sequential Logic-Based Stochastic Computing
0 -- 0Abhishek Koneru, Sukeshwar Kannan, Krishnendu Chakrabarty. Impact of Electrostatic Coupling and Wafer-Bonding Defects on Delay Testing of Monolithic 3D Integrated Circuits
0 -- 0Honglan Jiang, Cong Liu 0015, Leibo Liu, Fabrizio Lombardi, Jie Han. A Review, Classification, and Comparative Evaluation of Approximate Arithmetic Circuits
0 -- 0Sandeep Kumar Samal, Guoqing Chen, Sung Kyu Lim. Improving Performance under Process and Voltage Variations in Near-Threshold Computing Using 3D ICs
0 -- 0Hui Li, Sébastien Le Beux, Martha Johanna Sepúlveda, Ian O'Connor. Energy-Efficiency Comparison of Multi-Layer Deposited Nanophotonic Crossbar Interconnects
0 -- 0Mrityunjay Ghosh, Amlan Chakrabarti, Niraj K. Jha. Automated Quantum Circuit Synthesis and Cost Estimation for the Binary Welded Tree Oracle

Volume 13, Issue 3

0 -- 0Keith A. Britt, Travis S. Humble. High-Performance Computing with Quantum Processing Units
0 -- 0Su-Kyung Yoon, Young-Sun Youn, Kihyun Park, Shin-Dug Kim. Mobile Unified Memory-Storage Structure Based on Hybrid Non-Volatile Memories
0 -- 0Cory E. Merkel, Dhireesha Kudithipudi, Manan Suri, Bryant Wysocki. Stochastic CBRAM-Based Neuromorphic Time Series Prediction System
0 -- 0Armin Alaghi, Wei-Ting Jonas Chan, John P. Hayes, Andrew B. Kahng, Jiajia Li. Trading Accuracy for Energy in Stochastic Circuit Design
0 -- 0Yin Liu, Keshab K. Parhi. Computing Polynomials Using Unipolar Stochastic Logic
0 -- 0Adam Page, Ali Jafari, Colin Shea, Tinoosh Mohsenin. SPARCNet: A Hardware Accelerator for Efficient Deployment of Sparse Convolutional Networks
0 -- 0Rasit Onur Topaloglu, Naveen Verma. Editorial for JETC Special Issue on Alternative Computing Systems
0 -- 0Mohammed Alawad, Mingjie Lin. Sketching Computation with Stochastic Processing Engines
0 -- 0Yu Cao, Xin Li, Taemin Kim, Suyog Gupta. Guest Editors' Introduction: Hardware and Algorithms for On-Chip Learning
0 -- 0Bing Li, Yu Hu, Ying Wang, Jing Ye, Xiaowei Li. Power-Utility-Driven Write Management for MLC PCM
0 -- 0Krishnendu Guha, Debasri Saha, Amlan Chakrabarti. Real-Time SoC Security against Passive Threats Using Crypsis Behavior of Geckos
0 -- 0Soheil Salehi, Deliang Fan, Ronald F. DeMara. Survey of STT-MRAM Cell Design Strategies: Taxonomy and Sense Amplifier Tradeoffs for Resiliency
0 -- 0Arvind Kumar, Zhe Wan, Winfried W. Wilcke, Subramanian S. Iyer. Toward Human-Scale Brain Computing Using 3D Wafer Scale Integration
0 -- 0Bo Yuan, Keshab K. Parhi. VLSI Architectures for the Restricted Boltzmann Machine
0 -- 0Robert Karam, Somnath Paul, Ruchir Puri, Swarup Bhunia. Memory-Centric Reconfigurable Accelerator for Classification and Machine Learning Applications
0 -- 0Songping Yu, Nong Xiao, Mingzhu Deng, Fang Liu, Wei Chen 0009. Redesign the Memory Allocator for Non-Volatile Main Memory
0 -- 0Sajid Anwar, Kyuyeon Hwang, Wonyong Sung. Structured Pruning of Deep Convolutional Neural Networks
0 -- 0Anusha Gorantla, Deepa P. Design of Approximate Compressors for Multiplication
0 -- 0Pareesa Ameneh Golnari, Yavuz Yetim, Margaret Martonosi, Yakir Vizel, Sharad Malik. PPU: A Control Error-Tolerant Processor for Streaming Applications with Formal Guarantees
0 -- 0Leibin Ni, Hantao Huang, Zichuan Liu, Rajiv V. Joshi, Hao Yu. Distributed In-Memory Computing on Binary RRAM Crossbar
0 -- 0Priyadarshini Panda, Abhronil Sengupta, Kaushik Roy 0001. Energy-Efficient and Improved Image Recognition with Conditional Deep Learning

Volume 13, Issue 2

0 -- 0Sophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié. Non-Volatile Processor Based on MRAM for Ultra-Low-Power IoT Devices
0 -- 0Hang Zhang, Xuhao Chen, Nong Xiao, Lei Wang, Fang Liu, Wei Chen 0009, Zhiguang Chen. Shielding STT-RAM Based Register Files on GPUs against Read Disturbance
0 -- 0Ajay Singhvi, Matheus T. Moreira, Ramy N. Tadros, Ney Laert Vilar Calazans, Peter A. Beerel. A Fine-Grain, Uniform, Energy-Efficient Delay Element for 2-Phase Bundled-Data Circuits
0 -- 0Yao Wang, Liang Rong, Haibo Wang, Guangjun Wen. One-Step Sneak-Path Free Read Scheme for Resistive Crossbar Memory
0 -- 0Wei Jiang, Liang Wen, Ke Jiang, Xia Zhang, Xiong Pan, Keran Zhou. System-Level Design to Detect Fault Injection Attacks on Embedded Real-Time Applications
0 -- 0José L. Abellán, Chao Chen, Ajay Joshi. Electro-Photonic NoC Designs for Kilocore Systems
0 -- 0Yan Fang, Victor V. Yashin, Brandon B. Jennings, Donald M. Chiarulli, Steven P. Levitan. A Simplified Phase Model for Simulation of Oscillator-Based Computing Systems
0 -- 0Arnab Kumar Biswas. Source Authentication Techniques for Network-on-Chip Router Configuration Packets
0 -- 0Abdullah Guler, Niraj K. Jha. Ultra-low-leakage, Robust FinFET SRAM Design Using Multiparameter Asymmetric FinFETs
0 -- 0A. Arun Goud, Rangharajan Venkatesan, Anand Raghunathan, Kaushik Roy 0001. Asymmetric Underlapped FinFETs for Near- and Super-Threshold Logic at Sub-10nm Technology Nodes
0 -- 0Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Jian Zhang, Giovanni De Micheli, Ernesto Sánchez, Matteo Sonza Reorda. A Fault-Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors
0 -- 0Joydeep Rakshit, Kartik Mohanram, Runlai Wan, Kai-Tak Lam, Jing Guo. Monolayer Transistor SRAMs: Toward Low-Power, Denser Memory Systems
0 -- 0Xuan Wang 0001, Jiang Xu 0001, Zhe Wang 0003, Haoran Li, Peng Yang 0003, Luan H. K. Duong, Rafael K. V. Maeda, Zhifei Wang. Alleviate Chip Pin Constraint for Multicore Processor by On/Off-Chip Power Delivery System Codesign
0 -- 0Anderson L. Sartor, Arthur Francisco Lorenzon, Luigi Carro, Fernanda Lima Kastensmidt, Stephan Wong, Antonio C. S. Beck. Exploiting Idle Hardware to Provide Low Overhead Fault Tolerance for VLIW Processors
0 -- 0Sparsh Mittal. A Survey of Techniques for Architecting Processor Components Using Domain-Wall Memory
0 -- 0Aida Todri-Sanial, Saraju P. Mohanty, Mariane Comte, Marc Belleville. Guest Editorial Special Issue on Nanoelectronic Circuit and System Design Methods for the Mobile Computing Era
0 -- 0Meghna G. Mankalale, Sachin S. Sapatnekar. Optimized Standard Cells for All-Spin Logic
0 -- 0Zoha Pajouhi, Xuanyao Fong, Anand Raghunathan, Kaushik Roy 0001. Yield, Area, and Energy Optimization in STT-MRAMs Using Failure-Aware ECC

Volume 13, Issue 1

0 -- 0Shahed E. Quadir, JunLin Chen, Domenic Forte, Navid Asadizanjani, Sina Shahbazmohamadi, Lei Wang 0003, John Chandy, Mark Tehranipoor. A Survey on Chip to System Reverse Engineering
0 -- 0Arighna Deb, Robert Wille, Oliver Keszocze, Stefan Hillmich, Rolf Drechsler. Gates vs. Splitters: Contradictory Optimization Objectives in the Synthesis of Optical Circuits
0 -- 0Stephan De Castro, Jean-Max Dutertre, Bruno Rouzeyre, Giorgio Di Natale, Marie-Lise Flottes. Frontside Versus Backside Laser Injection: A Comparative Study
0 -- 0Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Gerardo Pelosi, Stefano Sanfilippo, Ruggero Susella. A Fault-Based Secret Key Retrieval Method for ECDSA: Analysis and Countermeasure
0 -- 0Jayita Das, Kevin Scott, Sanjukta Bhanja. MRAM PUF: Using Geometric and Resistive Variations in MRAM Cells
0 -- 0Amey M. Kulkarni, Youngok Pino, Matthew French, Tinoosh Mohsenin. Real-Time Anomaly Detection Framework for Many-Core Router through Machine-Learning Techniques
0 -- 0Elena Ioana Vatajelu, Giorgio Di Natale, Mario Barbareschi, Lionel Torres, Marco Indaco, Paolo Prinetto. STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability
0 -- 0Anirudh Iyengar, Swaroop Ghosh, Kenneth Ramclam, Jae-Won Jang, Cheng-Wei Lin. Spintronic PUFs for Security, Trust, and Authentication
0 -- 0Yu Bi, Kaveh Shamsi, Jiann-shiun Yuan, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Xunzhao Yin, Xiaobo Sharon Hu, Michael T. Niemier, Yier Jin. Emerging Technology-Based Design of Primitives for Hardware Security
0 -- 0Ozgur Sinanoglu, Ramesh Karri. Guest Editorial Special Issue on Secure and Trustworthy Computing
0 -- 0Yingjie Lao, Qianying Tang, Chris H. Kim, Keshab K. Parhi. Beat Frequency Detector-Based High-Speed True Random Number Generators: Statistical Modeling and Analysis