Journal: JETC

Volume 17, Issue 4

0 -- 0Serena Wang, Maya R. Gupta, Seungil You. Quit When You Can: Efficient Evaluation of Ensembles by Optimized Ordering
0 -- 0Wentao Chen, Hailong Qiu, Jian Zhuang, Chutong Zhang, Yu Hu 0002, Qing Lu, Tianchen Wang, Yiyu Shi, Meiping Huang, Xiaowei Xu 0004. Quantization of Deep Neural Networks for Accurate Edge Computing
0 -- 0Bruno Henrique Meyer, Aurora Trinidad Ramirez Pozo, Wagner M. Nunan Zola. Improving Barnes-Hut t-SNE Algorithm in Modern GPU Architectures with Random Forest KNN and Simulated Wide-Warp
0 -- 0Mahmoud Masadeh, Yassmeen Elderhalli, Osman Hasan, Sofiène Tahar. A Quality-assured Approximate Hardware Accelerators-based on Machine Learning and Dynamic Partial Reconfiguration
0 -- 0Wen Xie, Zeyang Yao, Erchao Ji, Hailong Qiu, Zewen Chen, Huiming Guo, Jian Zhuang, Qianjun Jia, Meiping Huang. Artificial Intelligence-based Computed Tomography Processing Framework for Surgical Telementoring of Congenital Heart Disease
0 -- 0He Wang, Nicoleta Cucu Laurenciu, Yande Jiang, Sorin Cotofana. Graphene-Based Artificial Synapses with Tunable Plasticity
0 -- 0Chuliang Guo, Li Zhang, Xian Zhou, Grace Li Zhang, Bing Li, Weikang Qian, Xunzhao Yin, Cheng Zhuo. A Reconfigurable Multiplier for Signed Multiplications with Asymmetric Bit-Widths
0 -- 0Urmish Thakker, Igor Fedorov, Chu Zhou, Dibakar Gope, Matthew Mattina, Ganesh Dasika, Jesse G. Beu. Compressing RNNs to Kilobyte Budget for IoT Devices Using Kronecker Products
0 -- 0Yiran Chen, Qinru Qiu, Yingyan Lin. Introduction to the Special Issue on Hardware and Algorithms for Efficient Machine Learning - Part 2
0 -- 0Ulbert J. Botero, Ronald Wilson, Hangwei Lu, Mir Tanjidur Rahman, Mukhil A. Mallaiyan, Fatemeh Ganji, Navid Asadizanjani, Mark Mohammad Tehranipoor, Damon L. Woodard, Domenic Forte. Hardware Trust and Assurance through Reverse Engineering: A Tutorial and Outlook from Image Analysis and Machine Learning Perspectives
0 -- 0Febin P. Sunny, Ebadollah Taheri, Mahdi Nikdast, Sudeep Pasricha. A Survey on Silicon Photonics for Deep Learning
0 -- 0Shijun Gong, Jiajun Li, Wenyan Lu, Guihai Yan, Xiaowei Li 0001. ShuntFlowPlus: An Efficient and Scalable Dataflow Accelerator Architecture for Stream Applications
0 -- 0Victor M. Gan, Yibin Liang, Lianjun Li, Lingjia Liu, Yang Yi 0002. A Cost-Efficient Digital ESN Architecture on FPGA for OFDM Symbol Detection
0 -- 0Qing Yang 0011, Jiachen Mao, Zuoguan Wang, Hai (Helen) Li. Dynamic Regularization on Activation Sparsity for Neural Network Efficiency Improvement
0 -- 0Shihao Song, Jui Hanamshet, Adarsha Balaji, Anup Das 0001, Jeffrey L. Krichmar, Nikil D. Dutt, Nagarajan Kandasamy, Francky Catthoor. Dynamic Reliability Management in Neuromorphic Computing
0 -- 0Dharanidhar Dang, Sai Vineel Reddy Chittamuru, Sudeep Pasricha, Rabi N. Mahapatra, Debashis Sahoo. BPLight-CNN: A Photonics-Based Backpropagation Accelerator for Deep Learning
0 -- 0Xiaowei Xu 0004, Jiawei Zhang, Jinglan Liu, Yukun Ding, Tianchen Wang, Hailong Qiu, Haiyun Yuan, Jian Zhuang, Wen Xie, Yuhao Dong, Qianjun Jia, Meiping Huang, Yiyu Shi. Multi-Cycle-Consistent Adversarial Networks for Edge Denoising of Computed Tomography Images
0 -- 0Sumon Dey, Lee Baker, Joshua Schabel, Weifu Li, Paul D. Franzon. A Scalable Cluster-based Hierarchical Hardware Accelerator for a Cortically Inspired Algorithm
0 -- 0Md Musabbir Adnan, Sagarvarma Sayyaparaju, Samuel D. Brown, Mst Shamim Ara Shawkat, Catherine D. Schuman, Garrett S. Rose. Design of a Robust Memristive Spiking Neuromorphic System with Unsupervised Learning in Hardware

Volume 17, Issue 3

0 -- 0Johan Laurent, Christophe Deleuze, Florian Pebay-Peyroula, Vincent Beroulle. Bridging the Gap between RTL and Software Fault Injection
0 -- 0Sourabh Kulkarni, Sachin Bhat, Csaba Andras Moritz. Architecting for Artificial Intelligence with Emerging Nanotechnology
0 -- 0Nico Mexis, Nikolaos Athanasios Anagnostopoulos, Shuai Chen, Jan Bambach, Tolga Arul, Stefan Katzenbeisser 0001. A Lightweight Architecture for Hardware-Based Security in the Emerging Era of Systems of Systems
0 -- 0Ioannis Tsiokanos, Jack Miskelly, Chongyan Gu, Máire O'Neill, Georgios Karakonstantis. DTA-PUF: Dynamic Timing-aware Physical Unclonable Function for Resource-constrained Devices
0 -- 0Eros Camacho-Ruiz, Santiago Sánchez-Solano, Piedad Brox, Macarena C. Martínez-Rodríguez. Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm
0 -- 0Heewoo Kim, Aporva Amarnath, Javad Bagherzadeh, Nishil Talati, Ronald G. Dreslinski. A Survey Describing Beyond Si Transistors and Exploring Their Implications for Future Processors
0 -- 0M. Tanjidur Rahman, Nusrat Farzana, Dhwani Mehta, Shahin Tajik, Mark Mohammad Tehranipoor, Navid Asadizanjani. CONCEALING-Gate: Optical Contactless Probing Resilient Design
0 -- 0Shubhra Deb Paul, Swarup Bhunia. SILVerIn: Systematic Integrity Verification of Printed Circuit Board Using JTAG Infrastructure
0 -- 0Domenic Forte, Debdeep Mukhopadhyay, Ilia Polian, Yunsi Fei, Rosario Cammarota. Introduction to the Special Issue on Emerging Challenges and Solutions in Hardware Security
0 -- 0Jun Zhou, Mengquan Li, Pengxing Guo, Weichen Liu. Attack Mitigation of Hardware Trojans for Thermal Sensing via Micro-ring Resonator in Optical NoCs
0 -- 0Lauren Biernacki, Mark Gallagher 0003, Zhixing Xu, Misiker Tadesse Aga, Austin Harris 0001, Shijia Wei, Mohit Tiwari, Baris Kasikci, Sharad Malik, Todd M. Austin. Software-driven Security Attacks: From Vulnerability Sources to Durable Hardware Defenses
0 -- 0Advait Madhavan, Matthew W. Daniels, Mark D. Stiles. Temporal State Machines: Using Temporal Memory to Stitch Time-based Graph Computations
0 -- 0Unai Rioja, Servio Paguada, Lejla Batina, Igor Armendariz. The Uncertainty of Side-channel Analysis: A Way to Leverage from Heuristics
0 -- 0Yuntao Liu 0001, Michael Zuzak, Yang Xie, Abhishek Chakraborty 0001, Ankur Srivastava. Robust and Attack Resilient Logic Locking with a High Application-Level Impact
0 -- 0Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann, Harshit Srivastava, Ahmed Hallawa, Rainer Leupers. Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach
0 -- 0Damien Robissout, Lilian Bossuet, Amaury Habrard, Vincent Grosso. Improving Deep Learning Networks for Profiled Side-channel Analysis Using Performance Improvement Techniques
0 -- 0K. A. Asha, Li En Hsu, Abhishek Patyal, Hung-Ming Chen. Improving the Quality of FPGA RO-PUF by Principal Component Analysis (PCA)
0 -- 0Noor Ahmad Hazari, Ahmed Oun, Mohammed Niamat. Machine Learning Vulnerability Analysis of FPGA-based Ring Oscillator PUFs and Counter Measures
0 -- 0Tapobrata Dhar, Surajit Kumar Roy, Chandan Giri. Hardware Trojan Horse Detection through Improved Switching of Dormant Nets

Volume 17, Issue 2

0 -- 0Dat Tran, Christof Teuscher. Computational Capacity of Complex Memcapacitive Networks
0 -- 0Alexis Asseman, Nicolas Antoine, Ahmet S. Ozcan. Accelerating Deep Neuroevolution on Distributed FPGAs for Reinforcement Learning Problems
0 -- 0Mohit Khatwani, Hasib-Al-Rashid, Hirenkumar Paneliya, Mark Horton, Nicholas R. Waytowich, W. David Hairston, Tinoosh Mohsenin. A Flexible Multichannel EEG Artifact Identification Processor using Depthwise-Separable Convolutional Neural Networks
0 -- 0Shashank Adavally, Mahzabeen Islam, Krishna Kavi. Dynamically Adapting Page Migration Policies Based on Applications' Memory Access Behaviors
0 -- 0Adi Eliahu, Ronny Ronen, Pierre-Emmanuel Gaillardon, Shahar Kvatinsky. multiPULPly: A Multiplication Engine for Accelerating Neural Networks on Ultra-low-power Architectures
0 -- 0Yiran Chen, Qinru Qiu, Yingyan Lin. Introduction of Special Issue on Hardware and Algorithms for Efficient Machine Learning-Part 1
0 -- 0Qutaiba Alasad, Jie Lin, Jiann-Shuin Yuan, Deliang Fan, Amro Awad. Resilient and Secure Hardware Devices Using ASL
0 -- 0Saman Biookaghazadeh, Pravin Kumar Ravi, Ming Zhao 0002. Toward Multi-FPGA Acceleration of the Neural Networks
0 -- 0Morteza Hosseini, Tinoosh Mohsenin. Binary Precision Neural Network Manycore Accelerator
0 -- 0Anwesha Chatterjee, Shouvik Musavvir, Ryan Gary Kim, Janardhan Rao Doppa, Partha Pratim Pande. Power Management of Monolithic 3D Manycore Chips with Inter-tier Process Variations
0 -- 0Michiel Van Beirendonck, Jan-Pieter D'Anvers, Angshuman Karmakar, Josep Balasch, Ingrid Verbauwhede. A Side-Channel-Resistant Implementation of SABER
0 -- 0Anand Kumar Mukhopadhyay, Atul Sharma, Indrajit Chakrabarti, Arindam Basu, Mrigank Sharad. Power-efficient Spike Sorting Scheme Using Analog Spiking Neural Network Classifier
0 -- 0Nathan Zhang, Kevin Canini, Sean Silva, Maya R. Gupta. Fast Linear Interpolation
0 -- 0Manaar Alam, Sarani Bhattacharya, Debdeep Mukhopadhyay. Victims Can Be Saviors: A Machine Learning-based Detection for Micro-Architectural Side-Channel Attacks
0 -- 0Chia-Cheng Wu, Yi-Hsiang Hu, Chia-Chun Lin, Yung-Chih Chen, Juinn-Dar Huang, Chun-Yao Wang. Diagnosis for Reconfigurable Single-Electron Transistor Arrays with a More Generalized Defect Model
0 -- 0Palash Das, Hemangee K. Kapoor. CLU: A Near-Memory Accelerator Exploiting the Parallelism in Convolutional Neural Networks

Volume 17, Issue 1

0 -- 0Yunfeng Lu, Huaxi Gu, Xiaoshan Yu, Krishnendu Chakrabarty. Lotus: A New Topology for Large-scale Distributed Machine Learning
0 -- 0Muhammad Kamran Ayub, Muhammad Abdullah Hanif, Osman Hasan, Muhammad Shafique 0001. PEAL: Probabilistic Error Analysis Methodology for Low-power Approximate Adders
0 -- 0Janibul Bashir, Smruti R. Sarangi. GPUOPT: Power-efficient Photonic Network-on-Chip for a Scalable GPU
0 -- 0Ghasem Pasandi, Massoud Pedram. Depth-bounded Graph Partitioning Algorithm and Dual Clocking Method for Realization of Superconducting SFQ Circuits
0 -- 0Manaar Alam, Arnab Bag, Debapriya Basu Roy, Dirmanto Jap, Jakub Breier, Shivam Bhasin, Debdeep Mukhopadhyay. Neural Network-based Inherently Fault-tolerant Hardware Cryptographic Primitives without Explicit Redundancy Checks
0 -- 0Arnab Kumar Biswas. Network-on-Chip Intellectual Property Protection Using Circular Path-based Fingerprinting
0 -- 0Nandan Kumar Jha, Sparsh Mittal, Binod Kumar 0001, Govardhan Mattela. DeepPeep: Exploiting Design Ramifications to Decipher the Architecture of Compact DNNs