Journal: JETC

Volume 5, Issue 4

0 -- 0Weiguo Tang, Lei Wang, Fabrizio Lombardi. A defect/error-tolerant nanosystem architecture for DSP
0 -- 0Timothy J. Dysart, Peter M. Kogge. Organizing wires for reliability in magnetic QCA
0 -- 0Wei Zhang, Niraj K. Jha, Li Shang. A hybrid nano/CMOS dynamically reconfigurable system - Part I: Architecture
0 -- 0Wei Zhang, Niraj K. Jha, Li Shang. Design space exploration and data memory architecture design for a hybrid nano/CMOS dynamically reconfigurable architecture

Volume 5, Issue 3

0 -- 0Wei Zhang, Niraj K. Jha, Li Shang. A hybrid Nano/CMOS dynamically reconfigurable system - Part II: Design optimization flow
0 -- 0Rajat Subhra Chakraborty, Swarup Bhunia. A study of asynchronous design methodology for robust CMOS-nano hybrid system design
0 -- 0Muzaffer O. Simsir, Srihari Cadambi, Franjo Ivancic, Martin Rötteler, Niraj K. Jha. A hybrid nano-CMOS architecture for defect and fault tolerance
0 -- 0Shuo Wang, Jianwei Dai, El-Sayed Hasaneen, Lei Wang, Faquir Jain. Utilizing quantum dot transistors with programmable threshold voltages for low-power mobile computing

Volume 5, Issue 2

0 -- 0Michael Crocker, Xiaobo Sharon Hu, Michael T. Niemier. Defects and faults in QCA-based PLAs
0 -- 0Xiaoxia Wu, Paul Falkenstern, Krishnendu Chakrabarty, Yuan Xie. Scan-chain design and optimization for three-dimensional integrated circuits
0 -- 0Prateek Mishra, Anish Muttreja, Niraj K. Jha. Low-power FinFET circuit synthesis using multiple supply and threshold voltages
0 -- 0R. Iris Bahar. Introduction to special section: Best of NANOARCH 2008
0 -- 0Siddhartha Datta, Bharat Joshi, Arun Ravindran, Arindam Mukherjee. Efficient parallel testing and diagnosis of digital microfluidic biochips
0 -- 0Mehdi Baradaran Tahoori. Low-overhead defect tolerance in crossbar nanoarchitectures

Volume 5, Issue 1

0 -- 0Z. F. Wang, Huaixiu Zheng, Q. W. Shi, Jie Chen. Emerging nanodevice paradigm: Graphene-based electronics for nanoscale computing
0 -- 0Dennis Huo, Qiaoyan Yu, David Wolpert, Paul Ampadu. A simulator for ballistic nanostructures in a 2-D electron gas
0 -- 0Baris Taskin, Andy Chiu, Jonathan Salkind, Daniel Venutolo. A shift-register-based QCA memory architecture
0 -- 0Shuo Wang, Lei Wang, Faquir Jain. Towards achieving reliable and high-performance nanocomputing via dynamic redundancy allocation
0 -- 0Sandeep K. Shukla. Guest editorial: IEEE/ACM symposium on nanoscale architectures (NANOARCH07)