Journal: IEEE Trans. on Circuits and Systems

Volume 55-II, Issue 9

833 -- 837Ettore Lorenzo Firrao, Bram Nauta. An Automatic Antenna Tuning System Using Only RF Signal Amplitudes
838 -- 842Patrick R. Fleming, Brian D. Olson, W. Timothy Holman, Bharat L. Bhuva, Lloyd W. Massengill. Design Technique for Mitigation of Soft Errors in Differential Switched-Capacitor Circuits
843 -- 847Gerrit Groenewold. Optimal Filter Networks
848 -- 852Julius Kusuma, Vivek K. Goyal. Delay Estimation in the Presence of Timing Noise
853 -- 857Hung-Chih Lin, Hsiang-Han Wu, Tsin-Yuan Chang. An Active-Frequency Compensation Scheme for CMOS Low-Dropout Regulators With Transient-Response Improvement
858 -- 862Jennifer Pham, Anthony Chan Carusone. A Time-Interleaved DeltaSigma-DAC Architecture Clocked at the Nyquist Rate
863 -- 866Subhash C. Dutta Roy. On the Design of the Triple-Resonance Interstage Network
867 -- 871Rajarajan Senguttuvan, Shreyas Sen, Abhijit Chatterjee. Multidimensional Adaptive Power Management for Low-Power Operation of Wireless Devices
872 -- 876Xin Wang, Ranjit Gharpurey. Interference Cancellation in Broadband Wireless Systems Utilizing Phase-Aligned Injection-Locked Oscillators
877 -- 881Nan Sun, Hae-Seung Lee, Donhee Ham. Digital Background Calibration in Pipelined ADCs Using Commutated Feedback Capacitor Switching
882 -- 886Alexey Teplinsky, Orla Feely. Limit Cycles in a MEMS Oscillator
887 -- 891Antonio Buonomo, Alessandro Lo Schiavo. LC VCO
892 -- 896Igor M. Filanovsky, Luís Bica Oliveira, Chris J. M. Verhoeven, Jorge R. Fernandes. Switching Time in Relaxation Oscillations of Emitter-Coupled Multivibrators
897 -- 901Su-Hon Lin, Ming-Hwa Sheu. n+1 Adder Using Circular Carry Selection
902 -- 906Pramod Kumar Meher. New Approach to Scalable Parallel and Pipelined Realization of Repetitive Multiple Accumulations
907 -- 911Hyunwoo Nho, Sei Seung Yoon, S. Simon Wong, Seong-Ook Jung. Numerical Estimation of Yield in Sub-100-nm SRAM Design Using Monte Carlo Simulation
912 -- 916Mohammed Sayed, Wael M. Badawy, Graham A. Jullien. Towards an H.264/AVC HW/SW Integrated Solution: An Efficient VBSME Architecture
917 -- 921Michael A. Turi, José G. Delgado-Frias. High-Performance Low-Power Selective Precharge Schemes for Address Decoders
922 -- 926Jui-Yuan Yu, Ching-Che Chung, Chen-Yi Lee. A Symbol-Rate Timing Synchronization Method for Low Power Wireless OFDM Systems
927 -- 931Hui Ren, Ian Dobson. Using Transmission Line Outage Data to Estimate Cascading Failure Propagation in an Electric Power System
932 -- 936Jianshe Wu, Licheng Jiao. Global Synchronization and State Tuning in Asymmetric Complex Dynamical Networks
937 -- 941Subramanian N. Lalgudi, Madhavan Swaminathan. LC Circuits
942 -- 946Boyuan Yan, Sheldon X.-D. Tan, Bruce McGaughy. RLCK Circuits
947 -- 951Hongbin Chen, Chi Kong Tse, Jiuchao Feng. Source Extraction in Bandwidth Constrained Wireless Sensor Networks
952 -- 956Jaewoon Kim, Sekwon Kim, Youngjin Park, Soonwoo Lee, Yoan Shin. An Effective Selective Detection Scheme Based on Pulse Repetition for Noncoherent UWB Systems

Volume 55-II, Issue 8

713 -- 717Marc Battista, Jean Gaubert, Matthieu Egels, Sylvain Bourdel, Hervé Barthélemy. High-Voltage-Gain CMOS LNA For 6-8.5-GHz UWB Receivers
718 -- 722Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye. A Fully Integrated CMOS Active Bandpass Filter for Multiband RF Front-Ends
723 -- 727Tong Ge, Joseph S. Chang. Bang-Bang Control Class-D Amplifiers: Power-Supply Noise
728 -- 732Kyoungsik Kang, Jeongjin Roh, Youngkil Choi, Hyungdong Roh, Hyunsuk Nam, Songjun Lee. Class-D Audio Amplifier Using 1-Bit Fourth-Order Delta-Sigma Modulation
733 -- 737Antonio Liscidini, Giuseppe Martini, Daniele Mastantuono, Rinaldo Castello. Analysis and Design of Configurable LNAs in Feedback Common-Gate Topologies
738 -- 742Lan Nan, Koen Mouthaan, Yong-Zhong Xiong, Jinglin Shi, Subhash Chander Rustagi, Ban-Leong Ooi. Design of 60- and 77-GHz Narrow-Bandpass Filters in CMOS Technology
743 -- 747Predrag Pejovic, Johann W. Kolar. Exact Analysis of Three-Phase Rectifiers With Constant Voltage Loads
748 -- 752Yuan Yen Mai, Philip K. T. Mok. A Constant Frequency Output-Ripple-Voltage-Based Buck Converter Without Using Large ESR Capacitor
753 -- 757Feng Su, Wing-Hung Ki. Component-Efficient Multiphase Switched-Capacitor DC-DC Converter With Configurable Conversion Ratios for LCD Driver Applications
758 -- 762Hussain A. Alzaher. A CMOS Digitally Programmable Universal Current-Mode Filter
763 -- 767Hong Li, Wallace Kit-Sang Tang, Zhong Li, Wolfgang A. Halang. A Chaotic Peak Current-Mode Boost Converter for EMI Reduction and Ripple Suppression
768 -- 770Tadashi Suetsugu, Marian K. Kazimierczuk. Maximum Operating Frequency of Class-E Amplifier at Any Duty Ratio
771 -- 775Dominic DiClemente, Fei Yuan, Adrian Tang 0002. Current-Mode Phase-Locked Loops With CMOS Active Transformers
776 -- 780S. S. Yin, S. C. Chan, Kai Man Tsui, X. M. Xie. On the Theory and Design of a Class of PR Uniform and Recombination Nonuniform Causal-Stable IIR Cosine Modulated Filter Banks
781 -- 785Charlotte Yuk-Fan Ho, Bingo Wing-Kuen Ling, Zhi-Wei Chi, Mohammad Shikh-Bahaei, Yanqun Liu, Kok Lay Teo. Design of Near-Allpass Strictly Stable Minimal-Phase Real-Valued Rational IIR Filters
786 -- 790Qutubuddin Saifee, Pushkar G. Patwardhan, Vikram M. Gadre. On Parallelepiped-Shaped Passbands for Multidimensional Nonseparable bf Mth-Band Low-Pass Filters
791 -- 792Irwin W. Sandberg. On Engineering Education, Superposition, and Commutativity
793 -- 796Vimal Singh. Stability Analysis of 2-D Discrete Systems Described by the Fornasini-Marchesini Second Model With State Saturation
797 -- 801Jiahai Wang. Hopfield Neural Network Based on Estimation of Distribution for Two-Page Crossing Number Problem
802 -- 805Wai Chee Shiu, Zhendong Shao, Kin Keung Poon, David Zhang. A New Approach to the L(2, 1) -Labeling of Some Products of Graphs
806 -- 810Long Cheng, Zeng-Guang Hou, Min Tan. A Neutral-Type Delayed Projection Neural Network for Solving Nonlinear Variational Inequalities
811 -- 815Yanjun Shen. LMI-Based Stability Criteria With Auxiliary Matrices for Delayed Recurrent Neural Networks
816 -- 820Zaiyue Yang, Che Wai Chan. The Response Bounds of Unknown Nonlinear Systems With Sinusoidal Input
821 -- 825Hyunwook Kim, Jaewoon Kim, Suckchel Yang, Minki Hong, Yoan Shin. An Effective MIMO-OFDM System for IEEE 802.22 WRAN Channels
826 -- 830Tsung-Heng Tsai, Yi-Jen Chen, Chi-Fang Li, Guo-Hua Pu, Yuan-Sun Chu. A Low-Power Synchronizer for Multistandard Wireless Communications

Volume 55-II, Issue 7

609 -- 613Adriana Becker-Gomez, T. Lakshmi Viswanathan, Thayamkulangara R. Viswanathan. A Low-Supply-Voltage CMOS Sub-Bandgap Reference
614 -- 618G. Reza Chaji, Arokia Nathan. A Current-Mode Comparator for Digital Calibration of Amorphous Silicon AMOLED Displays
619 -- 623Gaurav Chandra, Ankit Seedher. On the Spectral Tones in a Digital-Analog Converter Due to Mismatch and Flicker Noise
624 -- 627Shuenn-Yuh Lee, Jian-Yu Hsieh. Analysis and Implementation of a 0.9-V Voltage-Controlled Oscillator With Low Phase Noise and Low Power Dissipation
628 -- 632Gaetano Palumbo, Melita Pennisi, Salvatore Pennisi. Wien-Type Oscillators: Evaluation and Optimization of Harmonic Distortion
633 -- 637Fotis Plessas, A. Papalambrou, Grigorios Kalivas. A 5-GHz Subharmonic Injection-Locked Oscillator and Self-Oscillating Mixer
638 -- 642Woogeun Rhee, Keith A. Jenkins, John Liobe, Herschel A. Ainspan. Experimental Analysis of Substrate Noise Effect on PLL Performance
643 -- 647Atif Shamim, Muhammad Arsalan, Langis Roy, Maitham Shams, Nicolas G. Tarr. Wireless Dosimeter: System-on-Chip Versus System-in-Package for Biomedical and Space Applications
648 -- 652Sai-Weng Sin, U-Fat Chio, Seng-Pan U., Rui Paulo Martins. Statistical Spectra and Distortion Analysis of Time-Interleaved Sampling Bandwidth Mismatch
653 -- 657Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan, Ka Nang Leung. A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers
658 -- 662T. Hui Teo, Wooi Gan Yeoh. Low-Power Short-Range Radio CMOS Subharmonic RF Front-End Using CG-CS LNA
663 -- 667Jee Khoi Yin, P. K. Chan. A Low-Jitter Polyphase-Filter-Based Frequency Multiplier With Phase Error Calibration
668 -- 672Hairong Yu, Mau-Chung Frank Chang. A 1-V 1.25-GS/S 8-Bit Self-Calibrated Flash ADC in 90-nm Digital CMOS
673 -- 677Je-Hoon Lee, Young-Hwan Kim, Kyoung-Rok Cho. A Low-Power Implementation of Asynchronous 8051 Employing Adaptive Pipeline Structure
678 -- 679Andrzej Borys. Sandberg's Representation Theorem and Classification of Linear Systems
680 -- 684Xiyin Liang, Jiangfeng Zhang, Xiaohua Xia. Improving the Security of Chaotic Synchronization With a Delta-Modulated Cryptographic Technique
685 -- 689Zhendong Shao, Sandi Klavzar, Wai Chee Shiu, David Zhang. Improved Bounds on the L(2, 1)-Number of Direct and Strong Products of Graphs
690 -- 694Min Wu 0002, Fang Liu, Peng Shi, Yong He, Ryuichi Yokoyama. Improved Free-Weighting Matrix Approach for Stability Analysis of Discrete-Time Recurrent Neural Networks With Time-Varying Delay
695 -- 699Shuli Sun, Lihua Xie, Wendong Xiao, Nan Xiao. Optimal Filtering for Systems With Multiple Packet Dropouts
700 -- 704Francesco Renna, Stefano Marsili. A Gaussian Approximation of High-Order Distortion Spectrum in Broadband Amplifiers
705 -- 709Sungwook Yu, Tae Ho Im, Chang-Hwan Park, Jaekwon Kim, Yong Soo Cho. An FPGA Implementation of MML-DFE for Spatially Multiplexed MIMO Systems
710 -- 0Tianping Chen. Comments on "Improved Sufficient Conditions for Global Asymptotic Stability of Delayed Neural Networks"

Volume 55-II, Issue 6

497 -- 501Jeffery C. Allen, Diana Arceo, Peder Hansen. Optimal Lossy Matching by Pareto Fronts
502 -- 506Gaurav Chandra, Preetam Tadeparthy, Prakash Easwaran. Single Amplifier Bi-Quadratic Filter Topologies in Transimpedance Configuration
507 -- 511Debopriyo Chowdhury, Patrick Reynaert, Ali M. Niknejad. Transformer-Coupled Power Amplifier Stability and Power Back-Off Analysis
512 -- 516Tong Ge, Joseph Sylvester Chang. Modeling and Technique to Improve PSRR and PS-IMD in Analog PWM Class-D Amplifiers
517 -- 521Javad Yavand Hasani, Mahmoud Kamarei, Fabien Ndagijimana. Sub-nH Inductor Modeling and Design in 90-nm CMOS Technology for Millimeter-Wave Applications
522 -- 526Juan Antonio Leñero-Bardallo, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco. A Calibration Technique for Very Low Current and Compact Tunable Neuromorphic Cells: Application to 5-bit 20-nA DACs
527 -- 531Clara Isabel Lujan-Martinez, Ramón González Carvajal, Juan Antonio Gómez Galán, Antonio Jesús Torralba Silgado, Jaime Ramírez-Angulo, Antonio J. López-Martín. A Tunable Pseudo-Differential OTA With -78~hbox dB THD Consuming 1.25 mW
532 -- 536Sudhakar Pamarti. The Effect of Noise Cross-Coupling on Time-Interleaved Delta-Sigma ADCs
537 -- 540Ilias Pappas, Stilianos Siskos, Charalambos A. Dimitriadis. A Fast and Compact Analog Buffer Design for Active Matrix Liquid Crystal Displays Using Polysilicon Thin-Film Transistors
541 -- 545George Souliotis, Costas Psychalinos. Current-Mode Linear Transformation Filters Using Current Mirrors
546 -- 550Walter Aloisi, Rosario Mita. Gated-Clock Design of Linear-Feedback Shift Registers
551 -- 555Takuya Kadowaki, Yoshizumi Yamakawa, Hiroki Nakamura, Yasuo Kimura, Michio Niwano, Fujio Masuoka. nor Flash Memory
556 -- 560Jong Woo Kim, Bai-Sun Kong. Low-Voltage Bootstrapped CMOS Drivers With Efficient Conditional Bootstrapping
561 -- 565Hyung Chul Park, Hyung-Sun Lim, Jong-Won Yu. I/Q Regeneration in Five-Port Junction-Based Direct Receivers on Rayleigh Fading Channels
566 -- 570Jiasong Wu, Huazhong Shu, Lotfi Senhadji, Limin Luo. Radix-3, times, 3 Algorithm for The 2-D Discrete Hartley Transform
571 -- 575S. S. Yin, Shing-Chow Chan, Kai Man Tsui. On the Design of Nearly-PR and PR FIR Cosine Modulated Filter Banks Having Approximate Cosine-Rolloff Transition Band
576 -- 580Z. G. Zhang, Shing-Chow Chan, Kai Man Tsui. A Recursive Frequency Estimator Using Linear Prediction and a Kalman-Filter-Based Iterative Algorithm
581 -- 585Francisco J. Escribano, Luis López, Miguel A. F. Sanjuán. Chaos-Coded Modulations Over Rician and Rayleigh Flat Fading Channels
586 -- 590Jun-Guo Lu, David J. Hill. Global Asymptotical Synchronization of Chaotic Lur'e Systems Using Sampled Data: A Linear Matrix Inequality Approach
591 -- 595Hanyong Shao. Delay-Dependent Approaches to Globally Exponential Stability for Recurrent Neural Networks
596 -- 600Arnaldo Spalvieri, Maurizio Magarini. Wiener's Analysis of the Discrete-Time Phase-Locked Loop With Loop Delay
601 -- 605Ioannis L. Syllaios, Robert Bogdan Staszewski, Poras T. Balsara. Time-Domain Modeling of an RF All-Digital PLL

Volume 55-II, Issue 5

389 -- 393Koen Cornelissens, Michiel Steyaert. Design Considerations for Cascade Delta Sigma ADC's
394 -- 398Christian Falconi, Giuseppe Ferri, Vincenzo Stornelli, Andrea De Marcellis, Daniele Mazzieri, Arnaldo D'Amico. Current-Mode High-Accuracy High-Precision CMOS Amplifiers
399 -- 403Jongsik Kim, Jaewook Shin, Seungsoo Kim, Hyunchol Shin. LC VCO With Linearized Coarse Tuning Characteristics
404 -- 408Chihun Lee, Lan-chou Cho, Jia Hao Wu, Shen-Iuan Liu. A 50.8-53-GHz Clock Generator Using a Harmonic-Locked PD in 0.13- mum CMOS
409 -- 413Meng-Hung Shen, Po-Hsiang Lan, Po-Chiun Huang. A 1-V CMOS Pseudo-Differential Amplifier With Multiple Common-Mode Stabilization and Frequency Compensation Loops
414 -- 418Georgios Vitzilaios, Yannis Papananos. A Magnetic Feedback Method for Low-Voltage CMOS LNA Reverse-Isolation Enhancement
419 -- 422Tackya Yammouch, Kenichi Okada, Kazuya Masu. Physical Modeling of MEMS Variable Inductor
423 -- 426Gonzalo Álvarez Marañón, Luis Hernández Encinas, Jaime Muñoz Masqué. Known-Plaintext Attack to Two Cryptosystems Based on the BB Equation
427 -- 431Junho Cho, Wonyong Sung. Strength-Reduced Parallel Chien Search Architecture for Strong BCH Codes
432 -- 436Kin-Joe Sham, Shubha Bommalingaiahnapallya, Mahmoud Reza Ahmadi, Ramesh Harjani. A 3, times, 5-Gb/s Multilane Low-Power 0.18-muhbox m CMOS Pseudorandom Bit Sequence Generator
437 -- 441Young-Won Kim, Joo-Seong Kim, Jong Woo Kim, Bai-Sun Kong. CMOS Differential Logic Family With Conditional Operation for Low-Power Application
442 -- 446Hai Huyen Dam, Antonio Cantoni, Sven Nordholm, Kok Lay Teo. Variable Digital Filter With Group Delay Flatness Specification or Phase Constraints
447 -- 451Yongru Gu, Keshab K. Parhi. Design of Parallel Tomlinson-Harashima Precoders
452 -- 456Ewa Hermanowicz, Håkan Johansson, Miroslaw Rojewski. A Fractionally Delaying Complex Hilbert Transform Filter
457 -- 461Lin Wang 0003, Chaoxian Zhang, Guanrong Chen. Performance of an SIMO FM-DCSK Communication System
462 -- 463Michael Z. Q. Chen. A Note on PIN Polynomials and PRIN Rational Functions
464 -- 468Bin Tang, Guo-Ping Liu, Wei-Hua Gui. Improvement of State Feedback Controller Design for Networked Control Systems
469 -- 473Yun-Bo Zhao, Guo-Ping Liu, David Rees. Networked Predictive Control Systems Based on the Hammerstein Model
474 -- 478Tzung-Je Lee, Ching-Li Lee, Yan-Jhin Ciou, Chi-Chun Huang, Chua-Chin Wang. All-MOS ASK Demodulator for Low-Frequency Applications
479 -- 483Richard Tseng, Ada S. Y. Poon, Yun Chiu. A Mixed-Signal Vector Modulator for Eigenbeamforming Receivers
484 -- 488Min-Chul Lee, Tae-Woo Kwak, Bae-Kun Choi, Gyu-Hyeong Cho. A 4-W Master-Slave Switching Amplitude Modulator for Class-E1 EDGE Polar Transmitters
489 -- 493Siu Chung Wong, Xiaoqun Wu, Chi Kong Tse. Sustained Slow-Scale Oscillation in Higher Order Current-Mode Controlled Converter
494 -- 0Maurizio Martina, Guido Masera. Corrections to "Multiplierless, Folded 9/7-5/3 Wavelet VLSI Architecture" [Sep 07 770-774]

Volume 55-II, Issue 4

297 -- 298Aleksandar Tasic, Wouter A. Serdijn, Lawrence E. Larson. Guest Editorial Special Issue on Multifunctional Circuits and Systems for Future Generations of Wireless Communications - II
299 -- 303Mihai A. T. Sanduleanu, Maja Vidojkovic, Vojkan Vidojkovic, Arthur H. M. van Roermund, Aleksandar Tasic. Receiver Front-End Circuits for Future Generations of Wireless Communications
304 -- 308Christopher A. DeVries, Ralph D. Mason. Subsampling Architecture for Low Power Receivers
309 -- 313Pradeep Kotte Prakasam, Mandar Kulkarni, Xi Chen, Zhuizhuan Yu, Sebastian Hoyos, José Silva-Martínez, Edgar Sánchez-Sinencio. Applications of Multipath Transform-Domain Charge-Sampling Wide-Band Receivers
314 -- 318Tien-Yu Lo, Chung-Chih Hung. m- C Channel Selection Filter for Mobile Applications in 1-V Supply Voltage
319 -- 323Hee-Cheol Choi, Young-Ju Kim, Si-Wook Yoo, Sun Young Hwang, Seung-Hoon Lee. A Programmable 0.8-V 10-bit 60-MS/s 19.2-mW 0.13-mu m CMOS ADC Operating Down to 0.5 V
324 -- 328Danilo Manstretta, Nicola Laurenti, Rinaldo Castello. A Reconfigurable Narrow-Band MB-OFDM UWB Receiver Architecture
329 -- 333John F. M. Gerrits, John R. Farserotu, John R. Long. Low-Complexity Ultra-Wide-Band Communications
334 -- 338Yanjie Wang, Ali M. Niknejad, Vincent C. Gaudet, Kris Iniewski. A CMOS IR-UWB Transceiver Design for Contact-Less Chip Testing Applications
339 -- 343Nicolas Deparis, Christophe Loyez, Nathalie Rolland, Paul-Alain Rolland. UWB in Millimeter Wave Band With Pulsed ILO
344 -- 348Francois Rivet, Yann Deval, Jean-Baptiste Begueret, Dominique Dallet, Philippe Cathelin, Didier Belot. A Disruptive Receiver Architecture Dedicated to Software-Defined Radio
349 -- 353Gernot Hueber, Rainer Stuhlberger, Andreas Springer. An Adaptive Digital Front-End for Multimode Wireless Receivers
354 -- 358Zahra Sadat Ebadi, Resve Saleh. Adaptive Compensation of RF Front-End Nonidealities in Direct Conversion Receivers
359 -- 363Lauri Anttila, Mikko Valkama, Markku Renfors. I/Q Mismatch Calibration of Wideband Direct-Conversion Transmitters
364 -- 368Hua Yang, Guo-Ping Jiang. Irrational-Based Time-Hopping Modulation for UWB Communications
369 -- 373Maurizio Martina, Mario Nicola, Guido Masera. A Flexible UMTS-WiMax Turbo Decoder Architecture
374 -- 378Paul-Peter Sotiriadis. Diophantine Frequency Synthesis for Fast-Hopping, High-Resolution Frequency Synthesizers
379 -- 383Guangming Shi, Jie Lin, Xuyang Chen, Fei Qi, Danhua Liu, L. Zhang. UWB Echo Signal Detection With Ultra-Low Rate Sampling Based on Compressed Sensing

Volume 55-II, Issue 3

205 -- 206Gianluca Setti, Un-Ku Moon. A Note From the Editors
207 -- 208Aleksandar Tasic, Wouter A. Serdijn, Lawrence E. Larson. Guest Editorial Special Issue on Multifunctional Circuits and Systems for Future Generations of Wireless Communications - I
209 -- 213Fred Tzeng, Amin Jahanian, Payam Heydari. A Multiband Inductor-Reuse CMOS Low-Noise Amplifier
214 -- 218Tommy Kwong-Kin Tsang, Kuan-Yu Lin, Mourad N. El-Gamal. Design Techniques of CMOS Ultra-Wide-Band Amplifiers for Multistandard Communications
219 -- 223Mohammad B. Vahidfar, Omid Shoaei. A High IIP2 Mixer Enhanced by a New Calibration Technique for Zero-IF Receivers
224 -- 228Pieter Crombez, Jan Craninckx, Piet Wambacq, Michiel Steyaert. m-C Biquad in 0.13-mu m CMOS
229 -- 233Yi Ke, Jan Craninckx, Georges G. E. Gielen. A Design Approach for Power-Optimized Fully Reconfigurable Delta Sigma A/D Converter for 4G Radios
234 -- 238Afshin Haftbaradaran, Kenneth W. Martin. A Background Sample-Time Error Calibration Technique Using Random Data for Wide-Band High-Resolution Time-Interleaved ADCs
239 -- 243Jorge R. Fernandes, Hugo B. Goncalves, Luís Bica Oliveira, M. Medeiros Silva. A Pulse Generator for UWB-IR Based on a Relaxation Oscillator
244 -- 248Xiang Gao, Bram Nauta, Eric A. M. Klumperink. Advantages of Shift Registers Over DLLs for Flexible Low Jitter Multiphase Clock Generation
249 -- 253Chien-Jung Li, Chi-Tsan Chen, Tzyy-Sheng Horng, Je-Kuan Jau, Jian-Yu Li. High Average-Efficiency Multimode RF Transmitter Using a Hybrid Quadrature Polar Modulator
254 -- 258Sebastian M. Winter, Alexander Koelpin, Robert Weigel. Six-Port Receiver Analog Front-End: Multilayer Design and System Simulation
259 -- 263Renato Negra, Alexandre Sadeve, Souheil Bensmida, Fadhel M. Ghannouchi. Concurrent Dual-Band Class-F Load Coupling Network for Applications at 1.7 and 2.14 GHz
264 -- 268Wael M. Fathelbab. A New Class of Reconfigurable Microwave Bandpass Filters
269 -- 273John Groe. A Multimode Cellular Radio
274 -- 278Raveendranatha P. Mahesh, A. Prasad Vinod. Reconfigurable Frequency Response Masking Filters for Software Radio Channelization
279 -- 283Amir Eghbali, Håkan Johansson, Per Löwenborg. A Multimode Transmultiplexer Structure
284 -- 288John Dielissen, Nur Engin, Sergei Sawitzki, Kees van Berkel. Multistandard FEC Decoders for Wireless Devices
289 -- 293Hsin-Lei Lin, Robert Chen-Hao Chang, Hung Lien Chen. A High-Speed SDM-MIMO Decoder Using Efficient Candidate Searching for Wireless Communication

Volume 55-II, Issue 2

101 -- 105Hans Kristian Otnes Berge, Philipp Häfliger. A Gate Leakage Feedback Element in an Adaptive Amplifier Application
106 -- 110Wilmar Hernandez. Performance Analysis of a Robust Photometer Circuit
111 -- 115Paul J. Hurst, Andy Norrell. DAC Quantization-Noise Cancellation in an Echo-Canceling Transceiver
116 -- 120Inhwa Jung, Gunok Jung, Janghoon Song, Moo-young Kim, Junyoung Park, Sung-Bae Park, Chulwoo Kim. 2 Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor
121 -- 125Bradley A. Minch. MOS Translinear Principle for All Inversion Levels
126 -- 130Kambiz K. Moez, Mohamed I. Elmasry. A Low-Noise CMOS Distributed Amplifier for Ultra-Wide-Band Applications
131 -- 135Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal, Belén Calvo. Class-AB Fully Differential Voltage Followers
136 -- 140I.-Hsin Wang, Shen-Iuan Liu. A 0.18-muhbox m CMOS 1.25-Gbps Automatic-Gain-Control Amplifier
141 -- 145Charbel J. Akl, Magdy A. Bayoumi. Single-Phase SP-Domino: A Limited-Switching Dynamic Circuit Technique for Low-Power Wide Fan-in Logic Gates
146 -- 150Yuan Chen, Yu-Chi Tsao, Yu-Wei Lin, Chin-Hung Lin, Chen-Yi Lee. An Indexed-Scaling Pipelined FFT Processor for OFDM-Based WPAN Applications
151 -- 155Pramod Kumar Meher, Basant K. Mohanty, Jagdish Chandra Patra. Hardware-Efficient Systolic-Like Modular Design for Two-Dimensional Discrete Wavelet Transform
156 -- 160Sang-Hune Park, Kwang-Hee Choi, Jung-Bum Shin, Jae-Yoon Sim, Hong June Park. A Single-Data-Bit Blind Oversampling Data-Recovery Circuit With an Add-Drop FIFO for USB2.0 High-Speed Interface
161 -- 165ShaoChong Lei, Xueyan Hou, ZhiBiao Shao, Feng Liang. A Class of SIC Circuits: Theory and Application in BIST Design
166 -- 167Amr M. Youssef. An Attack Against the Revised Murthy-Swamy Cryptosystem
168 -- 172Charlotte Yuk-Fan Ho, Bingo Wing-Kuen Ling, Peter Kwong-Shun Tam. Representations of Linear Dual-Rate System Via Single SISO LTI Filter, Conventional Sampler and Block Sampler
173 -- 177Sang Yoon Park, Nam Ik Cho. Design of Multiplierless Lattice QMF: Structure and Algorithm Development
178 -- 182Jianbin Qiu, Gang Feng, Jie Yang 0004. infty Filtering Design for Discrete-Time Polytopic Linear Delay Systems
183 -- 187Qunjiao Zhang, Junan Lu, Jinhu Lu, Chi Kong Tse. Adaptive Feedback Synchronization of a General Complex Dynamical Network With Delayed Nodes
188 -- 192Manuel de la Sen. On the External Positivity of Linear Time-Invariant Dynamic Systems
193 -- 197Xingwen Liu, Long Wang, Wensheng Yu, Shouming Zhong. Constrained Control of Positive Discrete-Time Systems With Delays
198 -- 202Neeraj Keskar, Gabriel A. Rincón-Mora. LC Filter Variations

Volume 55-II, Issue 12

1209 -- 1213Shuenn-Yuh Lee, Ching-Yi Chen. Analysis and Design of a Wide-Tuning-Range VCO With Quadrature Outputs
1214 -- 1218Shao-Hung Lin, Shen-Iuan Liu. Full-Rate Bang-Bang Phase/Frequency Detectors for Unilateral Continuous-Rate CDRs
1219 -- 1223Chun-Hsien Kuo, Tai-Haur Kuo. Capacitor-Swapping Cyclic A/D Conversion Techniques With Reduced Mismatch Sensitivity
1224 -- 1228Ahmed Gharbiya, David A. Johns. Combining Multipath and Single-Path Time-Interleaved Delta-Sigma Modulators
1229 -- 1233Jaime Ramírez-Angulo, Sandhana Balasubramanian, Antonio J. López-Martín, Ramón González Carvajal. Low Voltage Differential Input Stage With Improved CMRR and True Rail-to-Rail Common Mode Input Range
1234 -- 1238Yun-Nan Chang. An Efficient VLSI Architecture for Normal I/O Order Pipeline FFT Design
1239 -- 1243Stefania Perri, Pasquale Corsonello. Fast Low-Cost Implementation of Single-Clock-Cycle Binary Comparator
1244 -- 1248Arjuna Madanayake, Sean Victor Hum, Leonard T. Bruton. A Systolic Array 2-D IIR Broadband RF Beamformer
1249 -- 1253Guo-An Su, Chih-Peng Fan. Low-Cost Hardware-Sharing Architecture of Fast 1-D Inverse Transforms for H.264/AVC and AVS Applications
1254 -- 1258Chao Cheng, Keshab K. Parhi. Hardware Efficient Low-Latency Architecture for High Throughput Rate Viterbi Decoders
1259 -- 1263Jun-Mei Yang, Hideaki Sakai. A Robust ICA-Based Adaptive Filter Algorithm for System Identification
1264 -- 1268Hung Gia Hoang, Hoang Duong Tuan, Truong Q. Nguyen, Ha Hoang Kha. Design of Exactly Linear Phase K -Regular IIR Half-Band Filter
1269 -- 1273Zbigniew Galias, Xinghuo Yu. Analysis of Zero-Order Holder Discretization of Two-Dimensional Sliding-Mode Control Systems
1274 -- 1278Paolo Checco, Marco Righero, Mario Biey, Ljupco Kocarev. Synchronization in Networks of Hindmarsh-Rose Neurons
1279 -- 1283Hao Yang, Vincent Cocquempot, Bin Jiang. Fault Tolerance Analysis for Switched Systems Via Global Passivity
1284 -- 1288Chuandong Li, Y. Y. Shen, Gang Feng. Stabilizing Effects of Impulses in Delayed BAM Neural Networks
1289 -- 1293Cailian Chen, Zhengtao Ding, Barry Lennox. Rejection of Nonharmonic Disturbances in Nonlinear Systems With Semi-Global Stability
1294 -- 1298Renquan Lu, Hongbo Zou, Hongye Su, Jian Chu, Anke Xue. Robust D -Stability for a Class of Complex Singularly Perturbed Systems
1299 -- 1303Graziano Chesi. Tightness Conditions for Semidefinite Relaxations of Forms Minimization
1304 -- 1308Mohammad Ghavami, Arash Amini, Farrokh Marvasti. Unified Structure of Basic UWB Waveforms
1309 -- 1313Catalin Lacatus, David Akopian, Mehdi Shadaram. Reduced Complexity Algorithm for Spreading Sequence Design
1314 -- 0Francisco J. Escribano, Luis López, Miguel A. F. Sanjuán. Corrections to "Chaos-Coded Modulation Over Rician and Rayleigh Flat Fading Channels"

Volume 55-II, Issue 11

1089 -- 1093Soon-Jyh Chang, Ying-Zu Lin, Yen-Ting Liu. A Digitally Calibrated CMOS Transconductor With a 100-MHz Bandwidth and 75-dB SFDR
1094 -- 1098Chi-Nan Chuang, Shen-Iuan Liu. A 3-8 GHz Delay-Locked Loop With Cycle Jitter Calibration
1099 -- 1103Alfio Dario Grasso, Gaetano Palumbo, Salvatore Pennisi. Comparison of the Frequency Compensation Techniques for CMOS Two-Stage Miller OTAs
1104 -- 1108Kaveh Hosseini, Michael Peter Kennedy. Architectures for Maximum-Sequence-Length Digital Delta-Sigma Modulators
1109 -- 1113Anuranjan Jha, Peter R. Kinget. Wideband Signal Synthesis Using Interleaved Partial-Order Hold Current-Mode Digital-to-Analog Converters
1114 -- 1118Ying Chen, Koen Mouthaan, Ban-Leong Ooi. Performance Enhancement of Colpitts Oscillators by Parasitic Cancellation
1119 -- 1123Shanthi Pavan. Excess Loop Delay Compensation in Continuous-Time Delta-Sigma Modulators
1124 -- 1128Daniel Fernández, Jordi Madrenas. A MOSFET-Based Wide-Dynamic-Range Translinear Element
1129 -- 1133Mohamed Helaoui, Safar Hatami, Renato Negra, Fadhel M. Ghannouchi. A Novel Architecture of Delta-Sigma Modulator Enabling All-Digital Multiband Multistandard RF Transmitters Design
1134 -- 1138Fakhrul Zaman Rokhani, Wen-Chih Kan, John C. Kieffer, Gerald E. Sobelman. Optimality of Bus-Invert Coding
1139 -- 1143Tso-Bing Juang. Low Latency Angle Recoding Methods for the Higher Bit-Width Parallel CORDIC Rotator Implementations
1144 -- 1148Katsuki Kobayashi, Naofumi Takagi. m)
1149 -- 1153Xin Xiao, Erdal Oruklu, Jafar Saniie. An Efficient FFT Engine With Reduced Addressing Logic
1154 -- 1158Håkan Johansson, Per Löwenborg. A Least-Squares Filter Design Technique for the Compensation of Frequency Response Mismatch Errors in Time-Interleaved A/D Converters
1159 -- 1162Juuso T. Olkkonen, Hannu Olkkonen. CR-Network
1163 -- 1167Chien-Yu Lu. A Delay-Range-Dependent Approach to Design State Estimator for Discrete-Time Recurrent Neural Networks With Interval Time-Varying Delay
1168 -- 1172Simin Yu, Wallace Kit-Sang Tang, Jinhu Lu, Guanrong Chen. Generation of n˟ m -Wing Lorenz-Like Attractors From a Modified Shimizu-Morioka Model
1173 -- 1177Mustak E. Yalcuin. A Simple Programmable Autowave Generator Network for Wave Computing Applications
1178 -- 1182Xiang-Jun Wen, Zheng-Mao Wu, Jun-Guo Lu. Stability Analysis of a Class of Nonlinear Fractional-Order Systems
1183 -- 1187Ying Liu, Wallace Kit-Sang Tang. Cryptanalysis of Chaotic Masking Secure Communication Systems Using an Adaptive Observer
1188 -- 1192Tao Li, Lei Guo, Chong Lin. Stability Criteria With Less LMI Variables for Neural Networks With Time-Varying Delay
1193 -- 1197Kwok-Wo Wong, Ching-Hung Yuen. Embedding Compression in Chaos-Based Cryptography
1198 -- 1202Jin-Liang Shao, Ting-Zhu Huang. A Note on "Global Robust Stability Criteria for Interval Delayed Neural Networks Via an LMI Approach"
1203 -- 1207Guillermo Fernández-Anaya, Baltazar Aguirre, Rodolfo Suárez, José-Job Flores-Godoy. On Operators on Positive Real Functions and Related Issues

Volume 55-II, Issue 10

961 -- 965Shao-Ku Kao, Shen-Iuan Liu. A Delay-Locked Loop With Statistical Background Calibration
966 -- 970Niels A. Moseley, Eric A. M. Klumperink, Bram Nauta. A Two-Stage Approach to Harmonic Rejection Mixing Using Blind Interference Cancellation
971 -- 975Arashk Norouzpour-Shirazi, S. Arash Mirhaj, Shahin Jafarabadi-Ashtiani, Omid Shoaei. A Novel Low Power 1 GS/s S&H Architecture With Improved Analog Bandwidth
976 -- 980Weiwei Shan, Yuan Ma, Robert W. Newcomb, Dongming Jin. Analog Circuit Implementation of a Variable Universe Adaptive Fuzzy Logic Controller
981 -- 985Ivan S. Uzunov. Theoretical Model of Ungrounded Inductance Realized With Two Gyrators
986 -- 990Anh-Tuan Do, Zhi-Hui Kong, Kiat Seng Yeo. Hybrid-Mode SRAM Sense Amplifiers: New Approach on Transistor Sizing
991 -- 995Gaetano Palumbo, Melita Pennisi, Salvatore Pennisi. Miller Theorem for Weakly Nonlinear Feedback Circuits and Application to CE Amplifier
996 -- 1000Song-Bok Kim, Tobias D. Werth, Stefan Joeres, Ralf Wunderlich, Stefan Heinen. Effect of Mismatched Loop Delay in Continuous-Time Complex Sigma-Delta Modulators
1001 -- 1005Ayman H. Ismail, Mohamed I. Elmasry. Analysis of the Flash ADC Bandwidth-Accuracy Tradeoff in Deep-Submicron CMOS Technologies
1006 -- 1010Mahmoud Reza Ahmadi, Jaekyun Moon, Ramesh Harjani. Constrained Partial Response Receivers for High-Speed Links
1011 -- 1015Jinseong Jeong, Yuanxun Ethan Wang. Pulsed Load Modulation (PLM) Technique for Efficient Power Amplification
1016 -- 1020Byungjin Chun, Michael P. Kennedy. Statistical Properties of First-Order Bang-Bang PLL With Nonzero Loop Delay
1021 -- 1025Ali Davoudi, Juri Jatskevich, Patrick L. Chapman. Computer-Aided Dynamic Characterization of Fourth-Order PWM DC-DC Converters
1026 -- 1030Hungwen Lu, Chauchin Su, Chien-Nan Jimmy Liu. A Scalable Digitalized Buffer for Gigabit I/O
1031 -- 1035Ya-Chun Lai, Shi-Yu Huang. A Resilient and Power-Efficient Automatic-Power-Down Sense Amplifier for SRAM Design
1036 -- 1040Byoung-Mo Moon, Young-June Park, Deog Kyoon Jeong. Monotonic Wide-Range Digitally Controlled Oscillator Compensated for Supply Voltage Variation
1041 -- 1045Haridimos T. Vergos, Costas Efstathiou. n+1 Addition
1046 -- 1050Timothy M. Hollis. Jittery Signal Generation for High-Speed Interconnect Simulation
1051 -- 1055Shaikh Anowarul Fattah, Wei-Ping Zhu, M. Omair Ahmad. Identification of Autoregressive Systems in Noise Based on a Ramp-Cepstrum Model
1056 -- 1060Jing Fu, Wei-Ping Zhu. A Nonlinear Acoustic Echo Canceller Using Sigmoid Transform in Conjunction With RLS Algorithm
1061 -- 1065Edgar Campos Furtado, Luis Antonio Aguirre, Leonardo A. B. Tôrres. UPS Parallel Balanced Operation Without Explicit Estimation of Reactive Power - A Simpler Scheme
1066 -- 1070Lu Liu, Jie Huang. Asymptotic Disturbance Rejection of the Duffing's System by Adaptive Output Feedback Control
1071 -- 1075Hanyong Shao. Improved Delay-Dependent Globally Asymptotic Stability Criteria for Neural Networks With a Constant Delay
1076 -- 1080Juan Resendiz, Wen Yu, Leonid M. Fridman. Two-Stage Neural Observer for Mechanical Systems
1081 -- 1085Yanhong Liu, Tiejun Chen, Chunwen Li, Yuzhen Wang, Bing Chu. 2 Disturbance Attenuation Excitation Control of Differential Algebraic Power Systems

Volume 55-II, Issue 1

1 -- 5Andrea Pugliese 0002, Gregorio Cappuccino, Giuseppe Cocorullo. Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers
6 -- 10Heng-Yu Jian, Zhiwei Xu, Mau-Chung Frank Chang. Delta-Sigma D/A Converter Using Binary- Weighted Digital-to-Analog Differentiator for Second-Order Mismatch Shaping
11 -- 15Adrian Tang 0002, Fei Yuan, Eddie Law. A New CMOS Active Transformer QPSK Modulator With Optimal Bandwidth Control
16 -- 20Massimo Alioto, Gaetano Palumbo. Power-Aware Design of Nanometer MCML Tapered Buffers
21 -- 25Ahmed Shebaita, Yehea I. Ismail. Multiple Threshold Voltage Design Scheme for CMOS Tapered Buffers
26 -- 30Guoqing Chen, Eby G. Friedman. Effective Capacitance of Inductive Interconnects for Short-Circuit Power Analysis
31 -- 35Sabyasachi Das, Sunil P. Khatri. A Timing-Driven Approach to Synthesize Fast Barrel Shifters
36 -- 40Yici Cai, Le Kang, Jin Shi, Xianlong Hong, Sheldon X.-D. Tan. Random Walk Guided Decap Embedding for Power/Ground Network Optimization
41 -- 45Yijiang Shen, Edmund Y. Lam, Ngai Wong. A Signomial Programming Approach for Binary Image Restoration by Penalized Least Squares
46 -- 50Shunsuke Yamaki, Masahide Abe, Masayuki Kawamata. 2-Sensitivity
51 -- 55P. Sumathi, P. A. Janakiraman. Integrated Phase-Locking Scheme for SDFT-Based Harmonic Analysis of Periodic Signals
56 -- 60F. N. Kong. Analytic Expressions of Two Discrete Hermite-Gauss Signals
61 -- 64Mingsheng Wang. Remarks on n -D Polynomial Matrix Factorization Problems
65 -- 69Yongxiang Xia, David J. Hill. Attack Vulnerability of Complex Communication Networks
70 -- 73M. Enamul Haque, Pranava K. Jha. L(j, , k) -Labelings of Kronecker Products of Complete Graphs
74 -- 78Ahmad Darabiha, Anthony Chan Carusone, Frank R. Kschischang. Block-Interlaced LDPC Decoders With Reduced Interconnect Complexity
79 -- 83Ji-Hoon Kim, In-Cheol Park. Double-Binary Circular Turbo Decoding Based on Border Metric Encoding
84 -- 88Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn, Christian Schlegel. A Compact Single-FPGA Fading-Channel Simulator
89 -- 91Metin Sengül. Synthesis of Cascaded Lossless Commensurate Lines
92 -- 96Jussi Rahola. Power Waves and Conjugate Matching