Journal: TRETS

Volume 3, Issue 4

19 -- 0Jason Williams, Chris Massie, Alan D. George, Justin Richardson, Kunal Gosrani, Herman Lam. Characterization of Fixed and Reconfigurable Multi-Core Devices for Application Acceleration
20 -- 0Miaoqing Huang, Vikram K. Narayana, Harald Simmler, Olivier Serres, Tarek A. El-Ghazawi. Reconfiguration and Communication-Aware Task Scheduling for High-Performance Reconfigurable Computing
21 -- 0Kentaro Sano, Wang Luzhou, Yoshiaki Hatsuda, Takanori Iizuka, Satoru Yamamoto. FPGA-Array with Bandwidth-Reduction Mechanism for Scalable and Power-Efficient Numerical Simulations Based on Finite Difference Methods
22 -- 0Manuel Saldaña, Arun Patel, Christopher A. Madill, Daniel Nunes, Danyao Wang, Paul Chow, Ralph Wittig, Henry Styles, Andrew Putnam. MPI as a Programming Model for High-Performance Reconfigurable Computers
23 -- 0Matt Chiu, Martin C. Herbordt. Molecular Dynamics Simulations on High-Performance Reconfigurable Computing Systems
24 -- 0Alessio Montone, Marco D. Santambrogio, Donatella Sciuto, Seda Ogrenci Memik. Placement and Floorplanning in Dynamically Reconfigurable FPGAs
25 -- 0Casey Reardon, Eric Grobelny, Alan D. George, Gongyu Wang. A Simulation Framework for Rapid Analysis of Reconfigurable Computing Systems
26 -- 0Xiang Tian, Khaled Benkrid. High-Performance Quasi-Monte Carlo Financial Simulation: FPGA vs. GPP vs. GPU

Volume 3, Issue 3

11 -- 0K. Scott Hemmert, Keith D. Underwood. Fast, Efficient Floating-Point Adders and Multipliers for FPGAs
12 -- 0Ahmad Sghaier, Shawki Areibi, Robert Dony. Implementation Approaches Trade-Offs for WiMax OFDM Functions on Reconfigurable Platforms
13 -- 0Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung. An Automated Flow for Arithmetic Component Generation in Field-Programmable Gate Arrays
14 -- 0James Moscola, Ron K. Cytron, Young H. Cho. Hardware-Accelerated RNA Secondary-Structure Alignment
15 -- 0Yosi Ben-Asher, Danny Meisler, Nadav Rotem. Reducing Memory Constraints in Modulo Scheduling Synthesis for FPGAs
16 -- 0Xiaojun Wang, Miriam Leeser. VFloat: A Variable Precision Fixed- and Floating-Point Library for Reconfigurable Hardware
17 -- 0Madhura Purnaprajna, Mario Porrmann, Ulrich Rückert, Michael Hussmann, Michael Thies, Uwe Kastens. Runtime Reconfiguration of Multiprocessors Based on Compile-Time Analysis
18 -- 0Sudarshan Banerjee, Elaheh Bozorgzadeh, Juanjo Noguera, Nikil Dutt. Bandwidth Management in Application Mapping for Dynamically Reconfigurable Architectures

Volume 3, Issue 2

6 -- 0John Bodily, Brent E. Nelson, Zhaoyi Wei, Dah-Jye Lee, Jeff Chase. A Comparison Study on Implementing Optical Flow and Digital Communications on FPGAs and GPUs
7 -- 0Konstantinos Papadopoulos, Ioannis Papaefstathiou. Titan-R: A Multigigabit Reconfigurable Combined Compression/Decompression Unit
8 -- 0Benoît Badrignans, David Champagne, Reouven Elbaz, Catherine H. Gebotys, Lionel Torres. SARFUM: Security Architecture for Remote FPGA Update and Monitoring
9 -- 0Sang-Kyung Yoo, Deniz Karakoyunlu, Berk Birand, Berk Sunar. Improving the Robustness of Ring Oscillator TRNGs
10 -- 0Ted Huffmire, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine, Brett Brotherton, Gang Wang, Timothy Sherwood, Ryan Kastner. Security Primitives for Reconfigurable Hardware-Based Systems

Volume 3, Issue 1

0 -- 0Saar Drimer, Tim Güneysu, Christof Paar. DSPs, BRAMs, and a Pinch of Logic: Extended Recipes for AES on FPGAs
0 -- 0David DuBois, Andrew DuBois, Thomas Boorman, Carolyn Connor Davenport, Steve Poole. Sparse Matrix-Vector Multiplication on a Reconfigurable Supercomputer with Application
0 -- 0John Curreri, Seth Koehler, Alan D. George, Brian Holland, Rafael Garcia. Performance Analysis Framework for High-Level Language Applications in Reconfigurable Computing
0 -- 0Antonio Roldao Lopes, George A. Constantinides. A High Throughput FPGA-Based Floating Point Conjugate Gradient Implementation for Dense Matrices
0 -- 0Shannon Koh, Oliver Diessel. Configuration Merging in Point-to-Point Networks for Module-Based FPGA Reconfiguration