External Links

    Journal: VLSI Design

    Volume 4, Issue 4

    0 -- 0Dinesh Bhatia. Field-Programmable Gate Arrays
    275 -- 291Stephen Dean Brown, Muhammad M. Khellah, Guy Lemieux. Segmented Routing for Speed-Performance and Routability in Field-Programmable Gate Arrays
    293 -- 307Kalapi Roy-Neogi, Bingzhong Guan, Carl Sechen. A Sea-of-Gates Style FPGA Placement Algorithm
    309 -- 328Kalapi Roy-Neogi, Carl Sechen. A Timing-Driven Partitioning System for Multiple FPGAs
    329 -- 343Don Cherepacha, David M. Lewis. DP-FPGA: An FPGA Architecture Optimized for Datapaths
    345 -- 355Srilata Raman, C. L. Liu 0001, Larry G. Jones. Timing-Constrained FPGA Placement: A Force-Directed Formulation and Its Performance Evaluation
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