Journal: VLSI Signal Processing

Volume 3, Issue 4

263 -- 0Vojin G. Oklobdzija, Belle Wei. Introduction
265 -- 274Brian D. Lee, Vojin G. Oklobdzija. Improved CLA scheme with optimized delay
283 -- 291Xiaoping Huang, Belle W. Y. Wei, Honglu Chen, Yuhai H. Mao. High-performance VLSI multiplier with a new redundant binary coding
293 -- 305Eric M. Schwarz, Michael J. Flynn. Cost-efficient high-radix division
307 -- 317Paul K.-G. Tu, Milos D. Ercegovac. Gate array implementation of on-line algorithms for floating-point operations
319 -- 328Thanos Stouraitis, Alexander Skavantzos. Multiplication of complex numbers encoded as polynomials
329 -- 344Theodora A. Varvarigou, Vwani P. Roychowdhury, Thomas Kailath. New algorithms for reconfiguring VLSI/WSI arrays
345 -- 355Vibeke Libby. Use of window addressable memories for high speed geometrical analysis

Volume 3, Issue 3

147 -- 0S. Y. Kung. Editorial
149 -- 0Ed F. Deprettere. Introduction
151 -- 161S. F. Hsieh, K. J. Ray Liu, Kung Yao. Systolic implementations of up/down-dating cholesky factorization using vectorized Gram-Schmidt pseudo orthoganalization
163 -- 172Marc Moonen, Joos Vandewalle. A square root covariance algorithm for constrained recursive least squares estimation
173 -- 182Hervé Le Verge, Christophe Mauras, Patrice Quinton. The ALPHA language and its use for the design of systolic arrays
183 -- 192Michaël F. X. B. van Swaaij, Jan Rosseel, Francky Catthoor, Hugo De Man. Synthesis of ASIC regular arrays for real-time image processing systems
193 -- 200Ingrid Verbauwhede, Francky Catthoor, Joos Vandewalle, Hugo De Man. In-place memory management of algebraic algorithms on application specific ICs
201 -- 214Jaime H. Moreno, Miguel E. Figueroa, Tomás Lang. Linear pseudosystolic array for partitioned matrix algorithms
215 -- 223Çetin Kaya Koç, Ching Yu Hung. Bit-level systolic arrays for modular multiplication
225 -- 236Anna Antola, Mariagiovanna Sami, Donatella Sciuto. Testing and diagnosis of::::FFT:::: arrays
237 -- 257Christian Lengauer, Jingling Xue. A systolic array for pyramidal algorithms

Volume 3, Issue 1-2

5 -- 6Josef A. Nossek. Introduction
7 -- 24Alfred Fettweis, Gunnar Nitsche. Numerical integration of partial differential equations using principles of multidimensional wave digital filters
25 -- 51Leon O. Chua, L. Yang, K. R. Krieg. Signal processing using cellular neural networks
53 -- 68A. Lumsdaine, John L. Wyatt Jr., Ibrahim M. Elfadel. Nonlinear analog networks for image smoothing and segmentation
69 -- 75J. G. M. C. Whirter, D. S. Broomhead, T. J. Shepherd. A systolic array for nonlinear adaptive filtering and pattern recognition
77 -- 92Jürgen Teich, Lothar Thiele. Control generation in the design of processor arrays
93 -- 103Josef G. Krammer. A sorter-based architecture for a parallel implementation of communication intensive algorithms
105 -- 119Gerhard Fettweis, Heinrich Meyr. Feedforward architectures for parallel Viterbi decoding
121 -- 140Tobias G. Noll. Carry-save architectures for high-speed digital signal processing