A Recurrently Generated Overlay Architecture for Rapid FPGA Application Development

David Wilson 0004, Greg Stitt, James Coole. A Recurrently Generated Overlay Architecture for Rapid FPGA Application Development. In Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, HEART 2018, Toronto, ON, Canada, June 20-22, 2018. ACM, 2018. [doi]

@inproceedings{0004SC18,
  title = {A Recurrently Generated Overlay Architecture for Rapid FPGA Application Development},
  author = {David Wilson 0004 and Greg Stitt and James Coole},
  year = {2018},
  doi = {10.1145/3241793.3241797},
  url = {https://doi.org/10.1145/3241793.3241797},
  researchr = {https://researchr.org/publication/0004SC18},
  cites = {0},
  citedby = {0},
  booktitle = {Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, HEART 2018, Toronto, ON, Canada, June 20-22, 2018},
  publisher = {ACM},
}