Novel Energy-Efficient and Latency-Improved PVT Tolerant Read Scheme for SRAM Design in Video Processing and Machine Learning Applications

Soumitra Pal 0004, Jiyue Yang, Stephen Bauer, Puneet Gupta 0001, Sudhakar Pamarti. Novel Energy-Efficient and Latency-Improved PVT Tolerant Read Scheme for SRAM Design in Video Processing and Machine Learning Applications. In 67th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2024, Springfield, MA, USA, August 11-14, 2024. pages 460-463, IEEE, 2024. [doi]

@inproceedings{0004YB0P24,
  title = {Novel Energy-Efficient and Latency-Improved PVT Tolerant Read Scheme for SRAM Design in Video Processing and Machine Learning Applications},
  author = {Soumitra Pal 0004 and Jiyue Yang and Stephen Bauer and Puneet Gupta 0001 and Sudhakar Pamarti},
  year = {2024},
  doi = {10.1109/MWSCAS60917.2024.10658903},
  url = {https://doi.org/10.1109/MWSCAS60917.2024.10658903},
  researchr = {https://researchr.org/publication/0004YB0P24},
  cites = {0},
  citedby = {0},
  pages = {460-463},
  booktitle = {67th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2024, Springfield, MA, USA, August 11-14, 2024},
  publisher = {IEEE},
  isbn = {979-8-3503-8717-9},
}