Latency Insensitive Design Styles for FPGAs

Mustafa Abbas, Vaughn Betz. Latency Insensitive Design Styles for FPGAs. In 28th International Conference on Field Programmable Logic and Applications, FPL 2018, Dublin, Ireland, August 27-31, 2018. pages 360-367, IEEE, 2018. [doi]

@inproceedings{AbbasB18,
  title = {Latency Insensitive Design Styles for FPGAs},
  author = {Mustafa Abbas and Vaughn Betz},
  year = {2018},
  doi = {10.1109/FPL.2018.00068},
  url = {https://doi.org/10.1109/FPL.2018.00068},
  researchr = {https://researchr.org/publication/AbbasB18},
  cites = {0},
  citedby = {0},
  pages = {360-367},
  booktitle = {28th International Conference on Field Programmable Logic and Applications, FPL 2018, Dublin, Ireland, August 27-31, 2018},
  publisher = {IEEE},
  isbn = {978-1-5386-8517-4},
}