NoC-aware cache design for multithreaded execution on tiled chip multiprocessors

Ahmed Abousamra, Alex K. Jones, Rami G. Melhem. NoC-aware cache design for multithreaded execution on tiled chip multiprocessors. In Manolis Katevenis, Margaret Martonosi, Christos Kozyrakis, Olivier Temam, editors, High Performance Embedded Architectures and Compilers, 6th International Conference, HiPEAC 2011, Heraklion, Crete, Greece, January 24-26, 2011. Proceedings. pages 197-205, ACM, 2011. [doi]

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