Efficient Designs for Adder Comparator

Hisako Adachi, Shinji Nakamura. Efficient Designs for Adder Comparator. In Proceedings of the 41st Annual Conference on Information Sciences and Systems, CISS 2007, 14-16 March 2007, Johns Hopkins University, Department of Electrical Engineering, Baltimore, MD, USA. pages 754, IEEE, 2007. [doi]

Abstract

Abstract is missing.