Trio Adiono, Marvin. Radix-4 Max-log-MAP parallel turbo decoder architecture with a new cache memory data flow for LTE. In International Symposium on Intelligent Signal Processing and Communications Systems, ISPACS 2012, Tamsui, New Taipei City, Taiwan, November 4-7, 2012. pages 792-797, IEEE, 2012. [doi]
Abstract is missing.