FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs

Dimitris Agiakatsikas, Ediz Cetin, Oliver Diessel. FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs. IEEE Trans. Aerospace and Electronic Systems, 54(6):2695-2712, 2018. [doi]

@article{AgiakatsikasCD18,
  title = {FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs},
  author = {Dimitris Agiakatsikas and Ediz Cetin and Oliver Diessel},
  year = {2018},
  doi = {10.1109/TAES.2018.2828201},
  url = {https://doi.org/10.1109/TAES.2018.2828201},
  researchr = {https://researchr.org/publication/AgiakatsikasCD18},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. Aerospace and Electronic Systems},
  volume = {54},
  number = {6},
  pages = {2695-2712},
}