Tariq Bashir Ahmad, Maciej J. Ciesielski. An Approach to Multi-core Functional Gate-Level Simulation Minimizing Synchronization and Communication Overheads. In 14th International Workshop on Microprocessor Test and Verification, MTV 2013, Austin, TX, USA, December 11-13, 2013. pages 77-82, IEEE, 2013. [doi]
Abstract is missing.