Novel Fault-Tolerant Adder Design for FPGA-Based Systems

Monica Alderighi, Sergio D Angelo, Giacomo R. Sechi, Cecilia Metra. Novel Fault-Tolerant Adder Design for FPGA-Based Systems. In 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 9-11 July 2001, Taormina, Italy. pages 54, IEEE Computer Society, 2001. [doi]

Abstract

Abstract is missing.