Zephyr: A Static Timing Analyzer Integrated in a Trans-hierarchical Refinement Design Flow

Christophe Alexandre, Marek Sroka, Hugo Clément, Christian Masson. Zephyr: A Static Timing Analyzer Integrated in a Trans-hierarchical Refinement Design Flow. In Johan Vounckx, Nadine Azémard, Philippe Maurine, editors, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings. Volume 4148 of Lecture Notes in Computer Science, pages 319-328, Springer, 2006. [doi]

Abstract

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