Power, Delay and Yield Analysis of BIST/BISR PLAs Using Column Redundancy

Uthman Alsaiari, Resve Saleh. Power, Delay and Yield Analysis of BIST/BISR PLAs Using Column Redundancy. In 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA. pages 703-710, IEEE Computer Society, 2007. [doi]

Abstract

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