A Methodology for Mapping SysML Activity Diagram to Time Petri Net for Requirement Validation of Embedded Real-Time Systems with Energy Constraints

Ermeson Carneiro de Andrade, Paulo Romero Martins Maciel, Gustavo Rau de Almeida Callou, Bruno Costa e Silva Nogueira. A Methodology for Mapping SysML Activity Diagram to Time Petri Net for Requirement Validation of Embedded Real-Time Systems with Energy Constraints. In Third International Conference on the Digital Society (ICDS 2009), February 1-7, 2009, Cancun, Mexico. pages 266-271, IEEE Computer Society, 2009. [doi]

Abstract

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