FPGA Implementation of a TVWS Up- and Downconverter Using Non-Power-of-Two FFT Modulated Filter Banks

Vianney Anis, Jincheng Guo, Stephan D. Weiss, Louise H. Crockett. FPGA Implementation of a TVWS Up- and Downconverter Using Non-Power-of-Two FFT Modulated Filter Banks. In 27th European Signal Processing Conference, EUSIPCO 2019, A Coruña, Spain, September 2-6, 2019. pages 1-5, IEEE, 2019. [doi]

Authors

Vianney Anis

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Jincheng Guo

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Stephan D. Weiss

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Louise H. Crockett

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