Efficient arithmetic logic gates using double-gate silicon nanowire FETs

Luca Arnani, Pierre-Emmanuel Gaillardon, Giovanni De Micheli. Efficient arithmetic logic gates using double-gate silicon nanowire FETs. In IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013, Paris, France, June 16-19, 2013. pages 1-4, IEEE, 2013. [doi]

Abstract

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