Venkatesh Arunachalam, Wayne Burleson. Low-power clock distribution in a multilayer core 3d microprocessor. In Vijay Narayanan, Zhiyuan Yan, Enrico Macii, Sanjukta Bhanja, editors, Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008. pages 429-434, ACM, 2008. [doi]
Abstract is missing.