Shankarram Athreya, Hiva Hedayati, Shayan Kazemkhani, Yanfei Chen, Saurabh Vats, Michael D. Scott, Bart Zeydel, Peter Keller, Jian Wang, Bhaskarareddy Avula, Boris Murmann, Echere Iroaga. Clock Synchronous Reset and Skew Calibration of 65GS/s ADCs in A Multi-Lane Coherent Receiver. In 44th IEEE European Solid State Circuits Conference, ESSCIRC 2018, Dresden, Germany, September 3-6, 2018. pages 250-253, IEEE, 2018. [doi]
Abstract is missing.